Help the boot loader and perform a bus clear. U-Boot will try to
read the MAC from the EEPROM and barebox has the complex boot
state stored in it.
In the past we have seen U-boot failing to read from the EEPROM
and let's have one place to initialize it.
Starting from revision F we can toggle a GPIO to control nWP of
the NAND chip. This means that during power-on or other mode of
operation no changes can be done to the flash.
Remove the nWP before we try to write to the flash in the UART
mode. Leave it enabled for further operations.
Do not block the boot process for five seconds or longer. When
adding the configurable timeout the other timeout code got broken.
Remove it and instead supply uart_recv_bytes with the timeout per
Before doing the NAND boot the 'I_ME' message will be sent and the
ubl will wait up to a second for a response. This interruption mode
can be disabled, e.g. when deploying the system in a publically
accessible system. Right now the possibility of easy recovery is