phyFLEX boards beginning with 1362.2 have a workaround for this
i.MX6 bug:
ERR006282 ROM code uses nonreset PFDs to generate clocks, which may
lead to random boot failures
On these boards the SD4_DAT3 pin os connected to the CMIC. The CMIC
will reset the board after 10s when the pin isn't toggled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The rule in barebox is to name the directories after
the modules. As hummingboard is just one of the
carriers for the MicroSOM module, name the directory
accordingly.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of repeating the same lowlevel init for every board
move it to it's own initcall.
Avoids code bloat and shaves off almost 1.5kB of uncompressed
barebox size for a default imx_v7_defconfig build.
For boards wherethe hostname setup was done in the postcore
initcall we move this to a device initcall to get it out of
the way.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix only two "interupt" misspellings in entire barebox codebase.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix misspellings of "persistent", including the renaming of a function
to "register_persistant_environment".
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add new chip revisions for the new tap-out TO1.5 (i.MX6Q/D) and TO1.2
(i.MX6DL/S)
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For some phyFLEX-i.MX6 modules the call __barebox_arm_head() was not removed.
With this function the barebox does not start.
Signed-off-by: Christian Hemp <christian.hemp@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The functions are already in the sandbox, just the #defines are
missing.
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The doxygen documentation is long outdated. Remove it. It will
be replaced with sphinx based documentation later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enables all relevant errata workarounds for the
i.MX6 SoC.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Header only implementation, so they can be pulled
into the individual SoC cpu init functions.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds pinctrl drivers for Marvell Dove and Kirkwood SoCs based
on a common driver stub. This design is based on the corresponding
Linux driver and should ease additional drivers for Marvell Armada
SoCs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have 'select COMMON_CLK' so 'select HAVE_CLK'
is redundant.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Marvell MVEBU SoC id and revision can be read out from any PCIe port
registers. This adds corresponding code to read out id and revision
and provides a helper function for drivers to use it.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Marvell MVEBU DT files contain some nodes mapped to PCI address space,
add the translator Kconfig to be able to iomap those node's addresses.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also we can enable m24c02 eeprom chip in dts-file e.g.
&i2c0 {
status = "okay";
eeprom: m24c02@50 {
compatible = "spd";
reg = <0x50>;
};
};
Alas! qemu mips malta spd m24c02 eeprom chip emulation is not perfect:
the block read operation does not work properly.
Here is an example.
If we read eeprom content byte-by-byte then there is no problem:
barebox:/ for i in 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f ;
> do i2c_read -b 0 -a 0x50 -r $i -c 1 ; done
0x01
0x75
0x54
0x00
0x82
0x08
0x00
0x01
Compare this output with content of qemu.git/hw/mips/mips_malta.c:
static eeprom24c0x_t spd_eeprom = {
.contents = {
...
/* 00000008: */ 0x01,0x75,0x54,0x00,0x82,0x08,0x00,0x01,
But if we read several bytes at once the we have data corruption:
barebox:/ i2c_read -b 0 -a 0x50 -r 0x8 -c 8
0x01 0xff 0xff 0xff 0xff 0xff 0xff 0xff
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MULTI_PBL images have a built-in dtb by default. With all MVEBU
SoCs converted to MULTI_PBL images, get rid of the extra Makefile
rules for appended dtbs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With all SoCs converted to DT based probing, select
PBL_MULTI_IMAGES support and get rid of SoCs Kconfig
choice to allow multiple boards to be selected.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This converts Marvell Armada XP based PlatHome Openblocks AX3-4
to PBL_MULTI_IMAGES. A DT overlay is added to keep possible
barebox-specific changes separated and added to lowlevel
board init.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This converts Marvell Armada XP based Marvell Armada XP GP
to PBL_MULTI_IMAGES. A DT overlay is added to keep possible
barebox-specific changes separated and added to lowlevel
board init.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This converts Marvell Armada 370 based Globalscale Mirabox
to PBL_MULTI_IMAGES. A DT overlay is added to keep possible
barebox-specific changes separated and added to lowlevel
board init.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With Armada 370/XP DT files available, convert Armada 370/XP SoC init
to register basic devices from DT only. Makefile targets for dtbs will
be removed again as soon as MULTI_PBL is available.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With Kirkwood DT files available, convert Kirkwood SoC init
to register basic devices from DT only. Makefile targets for
dtbs will be removed again as soon as MULTI_PBL is available.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Armada XP timers can be run from a 25MHz fixed clock. Add the corrsponding
clock and clock alias to SoC setup.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>