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9 Commits

Author SHA1 Message Date
Renaud Barbier cbeded2bad ppc: mpc8xxx: add DDR3 support
Add DDR3 support into the MPC8xxx DDR driver.

To avoid confusion, the function set_ddr_sdram_mode is renamed
set_ddr2_sdram_mode.

Checking for errors is simplified in the DDR2 DIMM parameters
computation to be consistent with DDR3.

This code is derived from the files found in directory drivers/ddr/fsl
from U-Boot version git-be937b5.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-03-19 07:42:58 +01:00
Alexander Shiyan 7c1a6a3c91 ppc 8xxx: Fix logic
Expression (pdimm->data_width >= 32) || (pdimm->data_width <= 40)
always evaluates to true, so probably we need to use "&&" here.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-01-29 21:38:10 +01:00
Renaud Barbier 04180c0464 ppc: mpc85xx: enable DDR driver
The use of the DDR driver as well as early I2C support is
enabled for board initialising their memory through SPD EEPROM
data.

A SOC specific function returning the DDR bus frequency
is added for the DDR driver to translate DDR timings to
register values.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-11-06 11:04:37 +01:00
Renaud Barbier b04e3c7b9d ppc ddr-8xxx: misplaced parenthesis
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-07-22 08:40:53 +02:00
Renaud Barbier ae2ecf974f ppc 8xxx: core DDR driver functions
These files are the driver interface to handle the memory
initialisation from reading the SPD data to writing the memory
controller registers.

This code is based on the equivalent files main.c in directory
arch/powerpc/cpu/mpc8xxx/ddr and ddr-gen2.c in directory
arch/powerpc/cpu/mpc85xx. Both are from U-Boot version git-a71d45d.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-06-27 08:38:04 +02:00
Renaud Barbier 4b65ac7e69 ppx 8xxx: DDR registers value calculation
The functions in this file calculate and store the value for each
register of the memory controller.

This code is based on the equivalent file in directory
arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-06-27 08:38:04 +02:00
Renaud Barbier 017da99b77 ppc 8xxx: DDR utility and memory options
This commit adds functions to calculate clock cycles, configure the
LAW registers and populate board memory options.

This code is based on the equivalent files in directory
arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-06-27 08:38:04 +02:00
Renaud Barbier 8567f00489 ppc 8xxx: DIMM parameters calculation
This code calculates the DIMM characteritics i.e DIMM
organization parameters and timings for DDR2 memory based on
SPD data.

It also provides a function to find out the lowest common DIMM
parameters to be used for all DIMMs.

This code is based on the equivalent files in directory
arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-06-27 08:38:04 +02:00
Renaud Barbier c6594ae1a3 ppc 8xxx: DDR headers
Structures are defined to record the common DIMM parameters
and memory options on a per DIMM basis.

This code is based on the equivalent files in directory
arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-06-27 08:38:04 +02:00