This is necessary because the C name for the flash header matches
the filename. For multiple board support we have to make the name
unique to prevent linker errors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In principle we could build barebox for multiple i.MX SoCs, so
select the correct SoC from the board selection.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This converts the Freescale i.MX53 loco aka qsb board to
multi image. The image will be named:
barebox-freescale-imx53-loco.img
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This also converts the Phytec phyCORE i.MX27 aka pcm038 to use
image compression. The image will be named
barebox-phytec-phycore-imx27.img
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the make infrastructure to build multiple SoC or
board specific images from a single barebox binary.
The basic idea is that we no longer have a single pbl, but instead
multiple pbls, one per image if necessary. Each pbl is defined
by its entry function so that each pbl can do exactly what a given
board needs. Additionally the pbls together with a self extracting
barebox binary can be encapsulated in specific image formats.
squashed in build fixes from Lucas Stach for make version >= 3.82:
Split Multimage Makefile rule in explicit and implicit parts
Fixes build with make version >=3.82
Frome the make 3.82 NEWS file:
* WARNING: Backward-incompatibility!
In previous versions of make it was acceptable to list one or more explicit
targets followed by one or more pattern targets in the same rule and it
worked "as expected". However, this was not documented as acceptable and if
you listed any explicit targets AFTER the pattern targets, the entire rule
would be mis-parsed. This release removes this ability completely: make
will generate an error message if you mix explicit and pattern targets in
the same rule.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Clocksource read callback expects incrementing timer values, while
internal timer on Marvell SoCs counts backwards. Fix value returned
by Marvell MVEBU and Orion clocksource drivers.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Marvell boards accidently add a .c instead of a .o file
to the targets. This has the side effect of breaking out of tree
compilation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Early I2C support is introduced to read SPD data from memory
modules prior to the loading of the I2C driver.
This code is based on the equivalent file fsl_i2c.c in directory
drivers/i2c from U-Boot version git-a71d45d.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These files are the driver interface to handle the memory
initialisation from reading the SPD data to writing the memory
controller registers.
This code is based on the equivalent files main.c in directory
arch/powerpc/cpu/mpc8xxx/ddr and ddr-gen2.c in directory
arch/powerpc/cpu/mpc85xx. Both are from U-Boot version git-a71d45d.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The functions in this file calculate and store the value for each
register of the memory controller.
This code is based on the equivalent file in directory
arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds functions to calculate clock cycles, configure the
LAW registers and populate board memory options.
This code is based on the equivalent files in directory
arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This code calculates the DIMM characteritics i.e DIMM
organization parameters and timings for DDR2 memory based on
SPD data.
It also provides a function to find out the lowest common DIMM
parameters to be used for all DIMMs.
This code is based on the equivalent files in directory
arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Structures are defined to record the common DIMM parameters
and memory options on a per DIMM basis.
This code is based on the equivalent files in directory
arch/powerpc/cpu/mpc8xxx/ddr from U-Boot version git-a71d45d.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Definitions and structures have been added to record DIMM parameters
and configure memory options.
The code is based on the equivalent files in the directory
arch/powerpc/include/asm from U-boot version git-a71d45d.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The code calculates the DDR2 SPD checksum as per JEDEC standard
No 21-C Appendix X (revision 1.2)
The code is based on the equivalent files from U-Boot version
git-a71d45d.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the upcoming multi image build process we will cat images together.
To find the concatenated image we need to reliably find the end of the
current binary. This adds a dummy section at the end of a pbl binary.
Its only purpose is to mark the end of the image. The multi image
patches will add something to this section so that it doesn't get
discarded by the linker.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The upcoming multi image support will need devicetree binary
blobs even when there is no builtin dtb. Instead of depending
on CONFIG_BUILTIN_DTB depend on CONFIG_OFTREE and let this option
select DTC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Sebastian Hesselbarth
Renaud Barbier