Rework the current framework so that I/O mapped I/O resources are
also possible.
Signed-off-by: Michel Stam <michel@reverze.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This macros are used in exported from linux TI DaVinci code.
Also this macros are used in MIPS cache support code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
An entry function should begin with a exception header. For this to work
properly the entry function should not contain any code which gcc might
put before the header. To make this sure change the ENTRY_FUNCTION macro
so that it generates one function which only contains the exception header
and a second function which contains the original body of the entry function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
asm/hardware.h does not have any content except including mach/hardware.h.
include mach/hardware.h directly where needed and get rid of asm/hardware.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The data caches should be invalided once during startup. This should
also be done when we do not have the MMU enabled in barebox because
the Kernel does not invalidate the caches during start.
To make this sure this patch enables the arm_early_mmu_cache_invalidate
function even if MMU support is disabled. Additionally this patch adds
calls to arm_early_mmu_cache_invalidate in start.c and uncompress.c.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
gpiolib user have nothing to define in their machine
specific gpio.h, so do not include it.
The only thing they could define would be ARCH_NR_GPIOS,
but currently no architecture defines it. Should an architecure
feel the need to do it this would be a good opportunity to
get rid of this limitation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the make infrastructure to build multiple SoC or
board specific images from a single barebox binary.
The basic idea is that we no longer have a single pbl, but instead
multiple pbls, one per image if necessary. Each pbl is defined
by its entry function so that each pbl can do exactly what a given
board needs. Additionally the pbls together with a self extracting
barebox binary can be encapsulated in specific image formats.
squashed in build fixes from Lucas Stach for make version >= 3.82:
Split Multimage Makefile rule in explicit and implicit parts
Fixes build with make version >=3.82
Frome the make 3.82 NEWS file:
* WARNING: Backward-incompatibility!
In previous versions of make it was acceptable to list one or more explicit
targets followed by one or more pattern targets in the same rule and it
worked "as expected". However, this was not documented as acceptable and if
you listed any explicit targets AFTER the pattern targets, the entire rule
would be mis-parsed. This release removes this ability completely: make
will generate an error message if you mix explicit and pattern targets in
the same rule.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Lucas Stach <dev@lynxeye.de>
This adds a new function __barebox_arm_head() which defines an
the regular barebox ARM header, but which jumps to the end of
the function so that this can be embedded into another function.
barebox_arm_head() now just uses it and jumps to barebox_arm_reset_vector
just like it did before.
This makes it possible to define board specific entry points.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Addionally to having a builtin DTB provide the possibility for
the board to provide a dtb via boarddata.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some SoCs come up with invalid entries in the data cache. This can
lead to memory corruption when we enable them later, so invalidate
the caches early.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Lucas Stach <l.stach@pengutronix.de>
On ARMv7 the intention is to disable the alignment trap to be able to
use hardware assisted unaligned load/stores. Fix the init to do the
right thing.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds 32bytes of space behind the image header (exception table
+ barebox magic) for board/SoC specific use. This can be used for
example to embed some extra information in a flashed image.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The comment above barebox_arm_entry promises to preserve the boarddata
variable passed to it which can then later get back with
barebox_arm_boarddata(). This function was missing so far, add it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For making the same binary executable on different SoCs which have
different DRAM addresses we have to be independent of the compile
time link address.
This patch adds relocatable binary support for the ARM architecture.
With this two new functions are available. relocate_to_current_adr
will fixup the binary to continue executing from the current position.
relocate_to_adr will copy the binary to a given address, fixup the
binary and continue executing from there.
For the PBL and the real image relocatable support can be enabled
independently. This is done to (hopefully) better cope with setups
where the PBL runs from SRAM or ROM and the real binary does not.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With relocatable binaries the vector addresses cannot be supplied by
the linker. This adds support for fixing them up during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With relocatable binaries the linker is not able to supply absolute
addresses. These only get available when the relocation function is
being run. Since for early initialization we need some variables
before relocation, we supply them relatively to some known address
in the binary. This means that the variables have to be converted
to absolute addresses during runtime.
This patch adds a C macro and an assembly macro to calculate the
variables during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since recently with MMU_EARLY support it may happen that setup_c
runs with data caches enabled, so we have to make sure the caches
are flushed before we jump to the new binary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When we have multi cpu support compiled in we need the cpu architecture
early so that we can pick the correct cacheflush function. Make it available
as static inline function and add a comment above it that this function
normally should not be used.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
detect the cpu model to dynamise the periphs mapping
currently only tested on qemu but should work on real hardware
Cortex-A9
if you use 1GiB of ram you can run the same barebox on Cortex-A15 or Cortex-A9
otherwise use vexpress_ca9_defconfig where the TEXT_BASE is at 0x63f00000
when we will add the relocation support this defconfig will be drop
qemu/arm-softmmu/qemu-system-arm -M vexpress-a9 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash0 -nographic
Cortex-A15
qemu/arm-softmmu/qemu-system-arm -M vexpress-a15 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash0 -nographic
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
reset is confusing with the cpu reset and impossible to grep
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Memory is a precious resource, so it makes sense to make it available as
early as possible. By definition the lowlevel init code already knows where
to find memory because it's the lowlevel init code which sets up the memory.
Until all boards are converted this new entry is just a fallback to the old
entry point.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Hi Sascha,
I've made the changes you suggested in this resent patch.
Everything related to custom ATAGs has been moved to the board
directory.
The generic code does not make any references to feature lists or
bootloader versions.
About the setup_feature_list prototype:
it has been renamed to atag_appender
it's not a function, it's a pointer to a function. Can it have a
prototype other than it's own declaration?
All non-related changes has been dropped. They were checkpatch.pl
warnings unrelated to this patch.
Regards,
Vicente.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Change function remap_range in arm architecture to make it
global accessable. For example command 'memtest' can change
pte flags to enable or disable cache.
Add dummy function for others architectures that doesn't
have mmu or pte support.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We allow unaligned accesses on ARMv6 onwards, make sure the CR_A
flag is cleared so that unaligned accesses do not trap.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The different ARM architectures need different cache functions. This
patch makes them selectable during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Once we run on multiple SoCs we must know which arm architecture we
are on. Add cpu_architecture() from the kernel to detect it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sometimes Assembler beats C. In this case a small assembler
function called without parameters can:
- copy a binary to its link address
- clear the bss
- return to the same position in the copied binary
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On some SoCs (for example AM35xx), the ROM bootloader passes useful
information in r0 when jumping to barebox.
To avoid overwriting this in the generic reset code, we introduce
common_reset as a C function and as an assembler macro. This is then
called form the reset entry point (either in common or in board code).
This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is unused now and not needed. We have a board_init_lowlevel. If a
board needs some architecture setup it can always call it from its
board_init_lowlevel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Michel Stam
Antony Pavlov
Sascha Hauer
Lucas Stach
Alexander Shiyan
Jean-Christophe PLAGNIOL-VILLARD
Vicente Bergas
Alexander Aring
Jan Luebbe