check the 4 mac address register and return at the first valid
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With commit c2ef47887 mci.f_max default value is
only set when pdata is available.
Fix this with always setting the mci.f_max default
value and overrite it when pdata available.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With this the verbosity of barebox can be controlled during runtime
using the 'loglevel' globalvar.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A printf in the driver should be dev_* and contain useful information.
Both is not the case, remove it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The driver didn't work well with at24 driver. NACKS are lost.
Errors are lost in isr due to the local variable err. Also we didn't wait for
bus free in omap_i2c_xfer_msg.
Fix issues and get other improvements from linux kernel
Tested on OMAP4 and AM335x
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Check for valid period size before calling ops->config. This fixes
the pxa driver which otherwise does a division by zero. While at
it, also check for duty_ns being smaller or equal to period_ns.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
The SoCFPGA currently has all clocks described in the devicetree which
makes common clock support a straight forward task.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as today qemu does not support phy, it will return always 0x0 to any read
on the mii bus. So the phy_id is 0 and the link is donw.
To have the norwork running on versatilpb & other qenu board for the link up
at 100Mbps.
Only enable if qemu_fixup is set.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will be done at activation
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
None of the driver make the difference between STDOUT and STDERR.
So we just need to check if putc or getc are filled in the console_device
save 32 bytes on versatilepb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can specify the devname in the board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least i.MX53 has errata ENGcm12360:
Occurs when a pending command which issues busy is completed.
For a command with R1b response, the proper software sequence
is to poll the DLA for R1b commands to determine busy
state completion. The DLA polling is not working properly for
the ESDHC module. This is relevant for all eSDHC ports (eSDHC1-4 ports)
DLA bit in PRSSTAT register cannot be
polled to wait for busy state completion.
Updated block guide to reflect that DLA is not applicable to detect
busy state, instead, should poll bit 24 in PRSSTAT register (DLSL[0] bit)
to check that wait busy state is over.
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
since the switch to common clock, ethernet driver doesn't works and
and access to the network leads to :
eth0: Read MDIO failed...
unable to handle NULL pointer dereference at address 0x000000c7
The problem is that bit 31 (SLEEP) of register HW_CLKCTRL_ENET is kept
to its default value (1) which means : "put Ethernet block in sleep mode.
CLK_H_MAC0(1), CLK_H_MAC0(1)_S, and CLK_ENET0(1)_TX are gated off.
Ethernet can be wakeup remotely in sleep mode"
In that case the FEC don't get its clock.
This patch fix the problem by toggling this bit when FEC's clock is
enabled.
Tested on i.MX28EVK.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the check is wrong as when the clock rate is correctly set
the function will return 0.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
when the bootmode is different than NAND (USB for example), the
GPMI clock is not enabled thus we can't probe a NAND flash.
Tested on an i.MX28
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
since the switch to common clock, SPI driver reports :
MXS: Timeout resetting block via register 0x80014000
mxs_spi mxs_spi2: MXS SPI: Timeout waiting for start
The reason is that the clock is not enabled anywhere in
the driver.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this fix :
drivers/serial/serial_auart.c:49:22: fatal error: mach/mxs.h: No such file or directory
and
drivers/serial/serial_auart.c: In function 'auart_serial_init_port':
drivers/serial/serial_auart.c:174:2: warning: implicit declaration of function 'stmp_reset_block' [-Wimplicit-function-declaration]
only compile tested ATM
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this fix :
drivers/spi/mxs_spi.c:29:22: fatal error: mach/mxs.h: No such file or directory
and
drivers/spi/mxs_spi.c: In function 'mxs_spi_setup':
drivers/spi/mxs_spi.c:102:2: error: too few arguments to function 'stmp_reset_block'
include/stmp-device.h:21:12: note: declared here
only compile tested ATM
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of hardcoding the alternate/enhanced descriptor layout make
it configurable during runtime. This is based on the value of the
enh_desc variable which is currently hardcoded to zero. This should
be configurable via device_id in the future. Since currently we have
no in tree user of this driver this currently doesn't hurt.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD
Teresa Gámez
Jan Weitzel
Dmitry Smagin
Markus Niebel
Eric Bénard