Commit graph

38 commits

Author SHA1 Message Date
Sascha Hauer
4cb8e17aa3 Merge branch 'for-next/misc' 2016-05-09 08:49:43 +02:00
Du Huanpeng
fe03b34fbe whole tree: remove trailing whitespaces
Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2016-04-21 15:17:52 +02:00
Sascha Hauer
041155f11c include: Move ns16550 serial platform_data to include/platform_data
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2016-04-15 08:44:42 +02:00
Sascha Hauer
423204c619 include: Move designware eth platform_data to include/platform_data
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2016-04-15 08:44:41 +02:00
Tim Sander
f3b493750a Terasic DE0-Nano-SoC: add support
v7: eof whitespace fixes

A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign

Signed-off-by: Tim Sander <tim@krieglstein.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2016-03-01 10:13:47 +01:00
Sascha Hauer
96b115be94 Merge branch 'for-next/socfpga' 2016-01-11 13:11:08 +01:00
Trent Piepho
76b059f311 socfpga: Find partition with environment via device tree
socfpga would load the environment from a file named "barebox.env"
located on the device "/dev/mmc0.1".  Both those names are hard-coded
in the socfpga code and can't be changed.

Barebox supports selecting the location of the environment using a
"barebox,environment" node in device tree's "chosen" node.  And
recently supports specifying that the env should come from a file on
this device.

Change socfpga to use this mechanism by adding the appropriate device
node.

Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2016-01-08 08:30:56 +01:00
Trent Piepho
c44e12f0bd socfpga: Allow setting partition xloader boots from for mmc
The xloader boots the 2nd stage barebox from socfpga_barebox_part when
using NOR.  But when using MMC it boots from a hardcoded "disk0.1".
Add the mmc device name to the partition description and use it for
mmc booting.

Add an extern declaration of socfpga_barebox_part to the socfpga
header so that a board can change it to use a different partition.

Initialize socfpga_barebox_part to the default value instead of NULL to
avoid the NULL check later.

Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-12-14 11:32:30 +01:00
Sascha Hauer
fab8198323 Merge branch 'for-next/socfpga' 2015-12-08 08:28:58 +01:00
Trent Piepho
5537d653d2 mci: dw_mmc: socfpga: Supply bus-width in platform_data
Since there is no OF support in the xloader on socfpga it uses the
platform_data system.  There needs to be a way to supply the
equivalent of the DT property bus-width this way to support devices
that need to use a smaller bus.

So that we don't need to put every flag that might get added to the
MMC_CAP list into platform_data, just put the bus width ones into
platform_data.

The socfpga dts sources specify a bus-width of 4 so use that in the
platform_data for socfpga.

Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-11-19 08:52:10 +01:00
Trent Piepho
3c8f016d9b socfpga: Initialize emac physels to RGMII correctly
A comment in the socfpga init said that it was "Clearing emac0 PHY
interface select to 0", but this was doubly incorrect.  It was setting
physel for emac1, not emac0, and it was setting physel to 1 (RGMII)
not 0 (GMII).  All supported socfpga boards use RGMII, and use emac1,
so fix the comment to reflect the code.  But then extend the code to
set the physel for both emac0 and emac1, so it can work on boards that
use either or both emacs (which are called gmac0/1 in the dts).

The Cyclone V datasheet, page 17-60 "EMAC HPS Interface
Initialization", says to set physel while the EMAC is in reset.  So
place the EMAC in reset while changing physel.  The emacs are not in
reset as code earlier in the boot has already taken most of the
modules out of reset.  So put them back in reset while the physel is
changed.  The Linux kernel does it this way too.

If barebox has no network support, there is not much point in
configuring the emac physel lines.  This would be the case for the
xloader pre-bootloader config, which configures physel, doesn't use
the network, loads the main barebox, which then reconfigures physel
again.  Make this code depend on CONFIG_NET so it's just done in the
main barebox.  The Linux kernel does not need barebox to do this
initialization to use networking.

Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-11-11 09:06:26 +01:00
Trent Piepho
a341b4d813 omap socfpga: Switch in flash env loading to use different config
On these systems, the base arch has code to load the in flash
environment from a file located in a FAT filesystem.  This was
controlled by the config option DEFAULT_ENVIRONMENT.  However, that
option turns on compiling the env into the barebox binary itself, as a
backup if the in flash env can't be loaded.

Most other boards have in flash env support unconditionally.  But omap
and socfpga also have xloader configurations, which aren't supposed to
have environment support, either in flash or compiled in.  If the in
flash env code were unconditional, then the xloaders would gain it.

So the code depends on ENV_HANDLING, which is only set on those boards
that are supposed to have an in flash env and not set on all the
boards that aren't supposed to have it.

If someone wanted to create a board that did have a saved env, but
used an alternate to this generic omap/socfpga file in FAT method,
then they'd probably want to create a new config option to control
this code and have it not be enabled for their board.

Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-11-05 09:03:17 +01:00
Sascha Hauer
83b0a5ae05 restart: replace reset_cpu with registered restart handlers
This replaces the reset_cpu() function which every SoC or board must
provide with registered handlers. This makes it possible to have multiple
reset functions for boards which have multiple ways to reset the machine.
Also boards which have no way at all to reset the machine no longer
have to provide a dummy reset_cpu() function.

The problem this solves is that some machines have external PMICs or
similar to reset the system which have to be preferred over the
internal SoC reset, because the PMIC can reset not only the SoC but also
the external devices.

To pick the right way to reset a machine each handler has a priority. The
default priority is 100 and all currently existing restart handlers are
registered with this priority. of_get_restart_priority() allows to retrieve
the priority from the device tree which makes it possible for boards to
give certain restart handlers a higher priority in order to use this one
instead of the default one.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-08-27 21:37:03 +02:00
Lucas Stach
8012bc199b ARM: socfpga: add default ARCH_TEXT_BASE
As SoCFPGA is multi-image enabled there is no real reason
to bother the user with asking for the text base. Fixes a
bunch of randcfg failures.

Regenerate defconfig to drop the explicit config there, which
unfortunately introduces quite a bit of churn.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-06-26 11:56:25 +02:00
Sascha Hauer
3a32e7acd4 Merge branch 'for-next/spi-nor' 2015-06-09 09:26:44 +02:00
Steffen Trumtrar
1849bfb9c1 ARM: socfpga: xload: support qspi bootsource
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-05-29 09:08:49 +02:00
Steffen Trumtrar
8989d3409e ARM: socfpga: update sdram calibration to 15.0
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-05-15 07:12:53 +02:00
Steffen Trumtrar
fbba349cd5 ARM: socfpga: add Altera SoCFPGA Development Kit support
Add support for the Altera SoCFPGA Development Kit.
The setup is based on the GHRD from Altera.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-03-02 07:43:25 +01:00
Steffen Trumtrar
0ebb0d236f ARM: socfpga: cleanup sequencer warnings
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-01-13 08:42:16 +01:00
Markus Pargmann
d28f535094 ARM: socfpga: Import sequencer code from generated uboot
This patch imports the sequencer code from uboot using the new script
scripts/socfpga_get_sequencer.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-01-13 08:42:16 +01:00
Steffen Trumtrar
ab3313e1a0 ARM: socfpga: clock-manager: set mainnandsdmmcclk
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-01-13 08:42:16 +01:00
Steffen Trumtrar
98f87fffc9 ARM: socfpga: clkmgr: bypass debug root clock
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-01-13 08:42:16 +01:00
Steffen Trumtrar
243ef1835b ARM: socfpga: clkmgr: set alteragrp clocks
Altera's U-Boot tree has following commit

	FogBugz #159721: Enhance Arria V MPU clock to 1050MHz

It writes to the two undocumented registers
	CLKMGR_ALTERAGRP_MPUCLK
and
	CLKMGR_ALTERAGRP_MAINCLK

to setup the SoC for higher clocks.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-01-13 08:42:16 +01:00
Steffen Trumtrar
27f362a57d ARM: socfpga: avoid using external regulator for PLL
From Altera U-Boot:
	FogBugz #210587: Fixing PLL HW configuration issue

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-01-13 08:42:16 +01:00
Masahiro Yamada
d8753571b2 sizes.h: move include/sizes.h to include/linux/sizes.h
This file originates in Linux.  Linux has it under include/linux/
directory since commit dccd2304cc90.
Let's move it to the same place as well in barebox.

This commit was generated by the following commands:

  find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:'
  git mv include/sizes.h include/linux/

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2015-01-08 14:00:26 +01:00
Steffen Trumtrar
24532c33fc ARM: socfpga: update sdram calibration to 14.0
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-12-08 08:39:11 +01:00
Steffen Trumtrar
bd40638ef0 ARM: socfpga: move iocsr from mach to board folder
The current iocsr-config-cyclone5.c is actually board specific, although the
file name suggests otherwise.
As the file was generated for the SoCkit, move it there and add a new one
for the socrates.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-12-08 08:39:11 +01:00
Sascha Hauer
e04540821b Firmware: socfpga: Add SoCFPGA FPGA program support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-09-09 10:30:26 +02:00
Michel Stam
9f556d4b6f x86: ns16550: Rework driver to allow for x86 I/O space
The current implementation fakes a memory-mapped I/O device
at 0x3f8 and 0x2f8, then uses platform read/write functions
to do the actual reading and writing. These platform functions
only exist for the x86 platform; better to move the I/O
routines into the driver and have the driver request I/O ports
using request_ioport_region.

Signed-off-by: Michel Stam <michel@reverze.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-04-09 19:31:42 +02:00
Sascha Hauer
144358e0aa Merge branch 'for-next/nfs'
Conflicts:
	defaultenv/defaultenv-2-base/bin/ifup
2014-03-07 09:25:44 +01:00
Alexander Shiyan
0758c478a6 ARM: socfgpa: Remove redundant assignment
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-02-17 08:06:11 +01:00
Uwe Kleine-König
f97f4b6571 mount: support filesystem options passed via -o
Similar to mount(8) the barebox command mount now supports passing a string
to the file system driver via -o.

This is used in the next commit to let the user specify port numbers for
nfs mounts.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-02-10 09:02:21 +01:00
Sascha Hauer
25cee7ec17 environment: Use accessor functions for default environment path
default_environment_path only exists when CONFIG_ENV_HANDLING is enabled.
Boards would have to #ifdef this if they wanted to use
default_environment_path. Use accessor functions instead which can
be ifdeffed on a single place.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-01-27 09:27:02 +01:00
Steffen Trumtrar
af10316742 ARM: socfpga: update iocsr config
Update the IO configuration to the Quartus v13.1 version. This seems to fix a
stability issue under the linux kernel when started with barebox.
As this is undocumented, autogenerated stuff, one can not be sure what it really
does nor if it really fixes the problem or just relocates it.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-12-10 08:42:12 +01:00
Steffen Trumtrar
3b3eb8fc0e ARM: socfgpa: update sequencer
Quartus II v13.1 generates updated sequencer.[ch] files.
Integrate the changes into the current driver.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-12-04 17:21:08 +01:00
Sascha Hauer
9fc58d665e ARM: SoCFPGA: Add EBV SoCrates board support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-09-23 08:40:32 +02:00
Sascha Hauer
e07ddb8b97 ARM: SoCFPGA: Add Terasic SoCkit board support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-09-23 08:40:32 +02:00
Sascha Hauer
5b5f6ab6bf ARM: Add Altera SoCFPGA support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-09-23 08:40:32 +02:00