This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format, removing
extraneous lines and spaces. No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The different ARM architectures need different cache functions. This
patch makes them selectable during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without MMU enabled we do not need to call __mmu_cache_* as the
caches are not enabled. Calling flush_icache() before jumping
to new code is enough.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The exception handlers need some space to write to. Traditionally
this has been some stack space. This is not necessary at all, so
just use some variable and get rid of the compile time fixed stack
address.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Once we run on multiple SoCs we must know which arm architecture we
are on. Add cpu_architecture() from the kernel to detect it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
start() for the PBL case is a duplicate of board_init_lowlevel_return().
Instead of duplicating it just call it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sometimes Assembler beats C. In this case a small assembler
function called without parameters can:
- copy a binary to its link address
- clear the bss
- return to the same position in the copied binary
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We called create_sections with 4096MB as size argument, but create_sections
expected the argument in bytes, so create sections was completely optimized
away due to the size >>= 20. This patch changes the size argument to be in
megabytes and adjusts map_cachable to pass the argument in megabytes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We can't do anything useful in the error function, so we just hang.
This has the advantage that at least when a JTAG debugger is connected
we can see what happens. Otherwise the code just jumps to NULL in case
of an error.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
remap_cache currently does not work, so enabling the MMU in the
PBL currently does not make sense. Disable it for now.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On some SoCs (for example AM35xx), the ROM bootloader passes useful
information in r0 when jumping to barebox.
To avoid overwriting this in the generic reset code, we introduce
common_reset as a C function and as an assembler macro. This is then
called form the reset entry point (either in common or in board code).
This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is unused now and not needed. We have a board_init_lowlevel. If a
board needs some architecture setup it can always call it from its
board_init_lowlevel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is unused now and not needed. We have a board_init_lowlevel. If a
board needs some architecture setup it can always call it from its
board_init_lowlevel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current approach to get the offset between link and runtime address
is fragile. It requires a big fat comment to put no code above it and it
requires an extra linker section. Instead use a small assembler function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that __mmu_cache_* restore the registers they can be called
as regular C functions. Create a header file for them and use
C functions rather than inline assembly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Save/restore the registers used in __mmu_cache_* so that they can
be called as regular C functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows for creating a lzo compressed binary unsing the pbl.
Only copy the piggydata if needed.
Add CONFIG_PBL_FORCE_PIGGYDATA_COPY option
In some case we need to copy the PIGGYDATA as the link address
as example we run from SRAM and shutdown the SDRAM/DDR for
reconfiguration but most of the time we just need to copy the
executable code.
based on Sascha Hauer
Add compressed image support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This allows for creating a pre-bootloader binary for
- nand boot
- mmc boot
- compressed image
The pbl will be incharge of the lowlevel init if needed.
The barebox will skip it.
Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
implement a dummy panic.
For now on introduce dummy zbarebox* targets and c code that will contain later
the decompressor. This only implemeted on ARM.
This patch is based on Sascha Hauer <s.hauer@pengutronix.de>
Add compressed image support patch
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
start.c has nothing to do with the exception vector table anymore,
so move it next to the exception handling code in exceptions.S
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Calculating the offset between runtime and linked address makes the
intention of the binary copy function a bit more clear.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We have the following in the tree:
|commit af42feb9d2
|Author: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
|Date: Mon Jan 2 11:49:17 2012 +0100
|
| ARM: set SCTRL[A] only when architecture does not support unaligned access
|
| Recent gcc generates code with unaligned access when architecture
| supports it. Setting A bit unconditionally causes data-aborts on such
| code rendering barebox unusable.
|
| Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
What the patch tried is correct: We should set the A bit only when the architecture
does not support unaligned accesses. To figure out whether the architecture supports
unaligned accesses the patch tested for the U bit which is wrong. The U bit may be
0 after a reset, so instead of testing for the U bit we have to set it. This can
be done on armv6 and later. All others have the A bit set to trap unaligned accesses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Traditionally we call __mmu_cache_flush in early startup. There
is a problem with armv7 and hierarchical caches though, on these
systems __mmu_cache_flush uses the stack. Appearantly this was
seldomly a problem, because most of these systems have a ROM
bootloader which sets up some stack, but on a special i.MX6 system
this failed badly. We should not have to flush caches here. Every
sane system should pass control to the bootloader without stale
entries in the caches *), so it should be a safe assumption that the
cache flush can be removed.
Since __mmu_cache_flush is not called from early code anymore we can
also move it to the regular text section.
Be brave and give it a try.
*) omap3 seems to be a exception to this, but this has a cache flush
in arch_init_lowlevel already
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Alexander Shiyan
Antony Pavlov
Sascha Hauer
Carlo Caione
Vicente Bergas
Jan Luebbe
Jean-Christophe PLAGNIOL-VILLARD
Marc Kleine-Budde