For better readability sort the list of known USB ids by VID and PID.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards or SoCs need the SRC_SCR[WARM_RESET_ENABLE] bit cleared,
otherwise they won't come up after a watchdog reset. This was observed
on one i.MX6ul based custom board. The Linux Kernel does the same since
2012: 0575fb7 ARM: 7198/1: arm/imx6: add restart support for imx6q.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested with Micron MT42L128M64D2LL-25WT and MT42L128M64D2LL-25WT
Signed-off-by: Maik Otto <m.otto@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Code-paths responsible for initializing CPU's stack pointer and variable
used in stack memory resource reservation got out of sync which resulted
in actual stack being 64K off from what "stack" struct resource
registered by arm_request_stack() thought it was.
At least one issue resulting from that can be easily triggered by
running:
memtest -t
This commit unifies the aforementioned code to a certain degree which
solves the problem and hopefuly makes it less likely to become an issue
again.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This has been missed in commit 5e61dd3fb5
(Add comp_copy function for use with CONFIG_IMAGE_COMPRESSION_NONE).
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Just as the other NVVAR functions, when support for NVVAR isn't
compiled in.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is needed since support for wildcards has been introduced.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
EEPROM support is an optional feature and the driver should work
just fine without it.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PBL is another feature, which needs some love to work on ARM64.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no point in trying to append a UBI root option, if there is
no UBI support in barebox.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If the chosen node does not exist, of_add_initrd fails to pass the
initrd to the kernel. Instead it should create the chosen node, just
like of_fixup_bootargs does.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In commit a63059d7 of the latest u-boot port, the function that
returns the inode number also resolves symlink. This prevents the
readlink entry point from doing its job and breaks the user command
readlink and the display of symlink with the ls command.
Remove the code following the link to restore original functionality.
Signed-off-by: Renaud Barbier <renaud.barbier@abaco.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The EVP_MD_CTX and EVP_CIPHER_CTX are made opaque since 1.1.x , so instead
of embedding them directly into struct sb_image_ctx and initializing them
using EVP_*_CTX_init(), we use pointers and allocate the crypto contexts
using EVP_*_CTX_new().
This is an adoption of the U-Boot commit 7bae13b7579a6b from Marek Vasut
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are two problems that made the driver choose the wrong baudrate
calculation algorithm:
a) The compatible used on 370/XP isn't marvell,armada-370-xp-spi but
marvell,armada-370-spi or marvell,armada-xp-spi respectively.
b) The probe function uses
match = of_match_node(mvebu_spi_dt_ids, dev->device_node);
to determine the right algorithm. As the devices are also compatible
to marvell,orion-spi and this comes first in mvebu_spi_dt_ids[]
it's always the older Orion algorithm that is used.
This patch fixes both problems.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes commit 0b47f95340 for i.MX25/35.
Otherwise the bootsource was just "unknown".
Signed-off-by: Daniel Krueger <daniel.krueger@systec-electronic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Port the clock dependency resolution algorithm utilized by Linux
kernel's version of of_clk_init(), to allow for SoCs whose DT clock
configuration reqires such behaviour for correct initialization (Vybrid
is one such example).
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some SoC (of which Vybrid is a one example) relegate GPIO direction
control to their pinmux IP block, instead of having that functionality
within GPIO IP. Add provisions to control that aspect of pinmux to
support such SoCs.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The partitions now may be in a subnode of the actual device node.
Eventually go another step up in the hierarchy if required.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The new binding recommends to put the partitions into a subnode
with compatible "fixed-partitions". Add support for this binding.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This chip can be found in 4th generation Kindle devices
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When we want to detect if a mtd device contains an UBI image then
testing the first block is not enough since it can always happen that
UBI has just erased the block before the power failed during last boot.
Since UBI only ever erases one block at a time and directly writes the
ec header to it afterwards, it shouldn't be necessary to scan the whole
device for UBI data. Scan the first 64 blocks. The first non-empty block
then must contain UBI data, if instead we find foreign data we assume
that no UBI is on that mtd device.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Barebox recognized false bad erase blocks while booting from a
Spansion NAND (1). This error occurred due a to high clock. The
Kernel sets the default NAND clock to 22Mhz. So, to fix this error and
to be more identical with the Kernel, the Barebox should be too.
1: nand: NAND device: Manufacturer ID: 0x01, Chip ID: 0xd3 (AMD/Spansion
S34ML08G2), 1024MiB, page size: 2048, OOB size: 128
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Tested-by: Stefan Lengfeld <s.lengfeld@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Driver "init" function might be called multiple times.
On every "init" Tx/Rx buffer descriptors are initialized: "descs_init"
-> "{tx|rx}_descs_init".
In its turn those init functions set MAC's "{tx|rx}desclistaddr" to
point on the first buffer descriptor in the list.
So CPU to start operation from the first buffer descriptor as well after
every "init" we have to reset "{tx|rx}_currdescnum".
[Original U-Boot patch by Alexey Brodkin <abrodkin@synopsys.com>]
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
"bus mode" register contains lots of fields and some of them don't
expect to be written with 0 (zero). So since we're only interested in
resetting MAC (which is done with setting the least significant bit of
this register with "0") I believe it's better to modify only 1 bit of
the register.
[Original U-Boot patch by Alexey Brodkin <abrodkin@synopsys.com>]
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Do not select MIIPORT for RGMII interface
[Original U-Boot patch by Vipin Kumar <vipin.kumar@st.com>]
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are a few registers where consecutive writes to the same location
should be avoided or have a delay.
According to Synopsys, here is a list of the registers and bit(s) where
consecutive writes should be avoided or a delay is required:
DMA Registers:
Register 0 Bit 7
Register 6 All bits except for 24, 16-13, 2-1.
GMAC Registers:
Registers 0-3 All bits
Registers 6-7 All bits
Register 10 All bits
Register 11 All bits except for 5-6.
Registers 16-47 All bits
Register 48 All bits except for 18-16, 14.
Register 448 Bit 4.
Register 459 Bits 0-3.
[Original U-Boot patch by Dinh Nguyen <dinguyen@altera.com>]
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Alexander Kurz
Sascha Hauer
Maik Otto
Andrey Smirnov
Lucas Stach
Philipp Zabel
Renaud Barbier
Uwe Kleine-König
Daniel Krüger
Christian Hemp
Daniel Schultz
Ian Abbott