Enables all relevant errata workarounds for the
i.MX6 SoC.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Header only implementation, so they can be pulled
into the individual SoC cpu init functions.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds pinctrl drivers for Marvell Dove and Kirkwood SoCs based
on a common driver stub. This design is based on the corresponding
Linux driver and should ease additional drivers for Marvell Armada
SoCs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Marvell MVEBU SoC id and revision can be read out from any PCIe port
registers. This adds corresponding code to read out id and revision
and provides a helper function for drivers to use it.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Marvell MVEBU DT files contain some nodes mapped to PCI address space,
add the translator Kconfig to be able to iomap those node's addresses.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
DT PCI address translation needs a special handling. This imports
the corresponding translator into of/address.c but makes it selectable
through Kconfig. Compared to the Linux version, we don't check for
struct device_node's type which does not exist on Barebox but directly
for device_type property set to "pci".
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MULTI_PBL images have a built-in dtb by default. With all MVEBU
SoCs converted to MULTI_PBL images, get rid of the extra Makefile
rules for appended dtbs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With all SoCs converted to DT based probing, select
PBL_MULTI_IMAGES support and get rid of SoCs Kconfig
choice to allow multiple boards to be selected.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This converts Marvell Armada XP based PlatHome Openblocks AX3-4
to PBL_MULTI_IMAGES. A DT overlay is added to keep possible
barebox-specific changes separated and added to lowlevel
board init.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This converts Marvell Armada XP based Marvell Armada XP GP
to PBL_MULTI_IMAGES. A DT overlay is added to keep possible
barebox-specific changes separated and added to lowlevel
board init.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This converts Marvell Armada 370 based Globalscale Mirabox
to PBL_MULTI_IMAGES. A DT overlay is added to keep possible
barebox-specific changes separated and added to lowlevel
board init.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With Armada 370/XP DT files available, convert Armada 370/XP SoC init
to register basic devices from DT only. Makefile targets for dtbs will
be removed again as soon as MULTI_PBL is available.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
With Kirkwood DT files available, convert Kirkwood SoC init
to register basic devices from DT only. Makefile targets for
dtbs will be removed again as soon as MULTI_PBL is available.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This reorders images/Makefile.mvebu targets by board to ease integration
of new boards.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Timers found on Marvell Armada 370 and XP require different setup.
While timer clock on Armada 370 can be derived from a divided
reference clocks, Armada XP always uses a 25MHz reference.
This also updates compatibles to destinguish timers for both SoCs
and fixes some whitespace issues on defines.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Armada XP timers can be run from a 25MHz fixed clock. Add the corrsponding
clock and clock alias to SoC setup.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
mach-mvebu has two files containing lowlevel code. Consolidate both into
mach-mvebu/lowlevel.c. Also put the now empty mach-mvebu/common.c into
non-lowlevel obj-y as it will be used for common non-lowlevel code later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
All current boards use the same TEXT_BASE, therefore set the default
TEXT_BASE by SoC instead of by board.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
For i.MX devicetree boards the console= parameter is automatically
generated and can be dropped from the env files. If a file becomes
empty then, remove it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The arch/arm/include/asm/gpio.h header file contains
#ifndef CONFIG_GPIOLIB
#include <mach/gpio.h>
#else
#include <asm-generic/gpio.h>
#endif
We use CONFIG_GPIOLIB=y for the only mach-versatile
Versatile/PB board so there is no need of <mach/gpio.h>.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 0d6392de4a introduced a stripped
down device tree used for both white and black Beaglebone variants
that included the 256 MiB memory node from am335x-bone-common.dtsi.
This leads to the following error in the MLO:
mmu: Critical Error: Can't request SDRAM region for ttb at 9fff4000
This patch removes the (for the Beaglebone black) invalid memory size
from the common device tree and instead registers the memory bank
manually in the board file.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
External NOR boot only requires copying the image to NOR Flash.
This also adds (un)protecting the flash which is required for
NOR Flash.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Lucas Stach
Sebastian Hesselbarth
Antony Pavlov
Philipp Zabel
Herve Codina