The 'off_t cur_ofs' variable was missed during the 64 bit conversion.
For the MEMGETBADBLOCK ioctl, a pointer to a loff_t is needed.
Also adjust the debug format strings.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since this commit we interpret the argument to the bad block ioctls
as a pointer to a 64bit number:
|commit e71c343668
|Author: Sascha Hauer <s.hauer@pengutronix.de>
|Date: Fri Oct 14 11:57:55 2011 +0200
|
| mtd: fix arguments to bad block ioctls
|
| In the Kernel the mtd ioctls expect a pointer to the offset, whereas
| barebox interprets the pointer itself as an offset. Since we want
| to add 64bit support for file sizes a pointer may not be sufficient,
| so align with the kernel and convert it to a pointer to the offset.
|
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This missed some places, fix them aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- add CMD_PARAM and read_param to get the ONFI structure
- fix OOB size for flash with 224 OOB on i.MX51/3
- add the same ecc layout as the one in the kernel for
4k page flashs
Tested on an i.MX53.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the code is taken from linux & u-boot implementations
Validated on an i.MX53 which gives the following log :
ONFI flash detected ... ONFI param page 0 valid
NAND device: Manufacturer ID: 0x2c, Chip ID: 0x38 (Micron MT29F8G08ABABAWP), page size: 4096, OOB size: 224
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We now have a resource size for the ehci hccr register space. This
was assumed to be 0x40 in size. On OMAP though it is only 0x10 and
then the hccr resource conflicts with the hcor resource which results
in a non working ehci port on beagle and panda boards. This patch
adds a nonintrusive workaround, it limits the hccr resource to 0x10,
which then also works on OMAP.
Later we should drop the multiple resources for the ehci port and
make the resource as specified in the datasheets.
This is broken since:
commit 08845e41fb
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date: Wed May 23 12:54:24 2012 +0200
usb ehci: Add resource sizes
add_usb_ehci_device registers resources with size 0. Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Storing the size instead of the resource end in struct resource was
a mistake. 'size' ranges from 0 to UINT[32|64]_MAX + 1 which obviously
leads to problems. 'end' on the other hand will never exceed
UINT[32|64]_MAX. Also this way we can express a iomem region covering
the whole address space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the Kernel the mtd ioctls expect a pointer to the offset, whereas
barebox interprets the pointer itself as an offset. Since we want
to add 64bit support for file sizes a pointer may not be sufficient,
so align with the kernel and convert it to a pointer to the offset.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The dump generated by "md -w -s /dev/phy0"
suggests individual registers need to be
addressed by byte offset, not by register number.
E.g. to set the autonegotiation advertisement register
for 10Mbit only, use "mw -w -d /dev/phy0 8+2 0x0061".
The current mix of offset == register number, but
count == byte count is unintuitive.
Also, to be consistent with "md" on /dev/mem, round up
the count so "8+1" also works to access one register.
However, no attempt is made to do read-modify-write
single byte writes.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Check if the PHY is really accessible (e.g. the
PHY address is correct) during probe.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The auto negotiation result is the intersect
of the advertised abilities and the link partner abilities.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on the U-Boot version. Changed to kernel style register layout, added
MX23 support (WIP!), made MMU aware and adapted to barebox.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Based on the U-Boot version. Changed to kernel style register layout, added
MX23 support, made MMU aware and adapted to barebox.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We do not need to invalidate the cache in the poll loop anymore
since the corresponding bit is now in a dma coherent area. Instead,
flush cache before hardware operation and invalidate afterwards. Put
the corresponding code inline since it's shorter.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There's no point in syncing them manually. Instead, use
dma_alloc_coherent and skip the manual flushing/invalidating.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is another variant of:
USB gadget fsl: request cacheline aligned buffer
The fsl udc driver allocates a buffer for small requests. The
driver then calls dma_inv_range later on it. This buffer happens
to be not cacheline aligned which means that a dma_inv_range can
corrupt other memory around the buffer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[mkl: use dma_alloc]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The fsl udc driver allocates a buffer for small requests. The
driver then calls dma_inv_range later on it. This buffer happens
to be not cacheline aligned which means that a dma_inv_range can
corrupt other memory around the buffer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[mkl: use dma_alloc]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a simple wd command which can setup, trigger and stop a watchdog
on the platform.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Linux Kernel defines only one of __LITTLE_ENDIAN and
__BIG_ENDIAN. Endianess can then be tested with #ifdef __xx_ENDIAN. Userspace
always defined both __LITTLE_ENDIAN and __BIG_ENDIAN and byteorder can then
be tested with #if __BYTE_ORDER == __xx_ENDIAN.
As we tend to use a lot of Kernel code in barebox we switch to use the kernel
way of determing the byte order.
As this always causes a lot of confusion add a check to include/common.h to
make sure only one of __LITTLE_ENDIAN and __BIG_ENDIAN is defined.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Straight forward port of Synopsys Designware ethernet
driver from u-boot v2012.04.01.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
resource_size_t can be 32bit or 64bit depending on the architecture.
Add a define for it to be able to printf a resource_size_t correctly
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Show progressbar even when erasing just a single sector,
otherwise it looks as if erase didn't do anything.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
"erase /dev/myflash0 0+1" erased the whole flash,
similar for other value of count if you guessed the
erae block size wrong.
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We have to set the name in struct usb_driver, not the one
in struct driver_d which gets overwritten with usb_driver->name
during registration.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To avoid unnecessary preset initial state chipselect lines for SPI, set it to
inactive state when adding devices to the system.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mc13xxx driver correctly bails out on failure, but leaves
mc_dev initialized, so a later mc13xxx_get won't fail but returns
an invalid pointer. Fix this. While at it, remove some superfluous
code from mc13xxx_get.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This causes allocation of a free id and avoids conflicts if multiple
identical SPI devices are attached.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Ok, I assume this should go into separate series. It fits both S5PV210 and S3C6410.
This adds support for S3C and S5P architectures (all of my knowledge) to the
serial driver. Since the only difference between them is in clock handling,
this is moved to an arch-dependent separate function.
Most modern architectures should define S3C_UART_HAS_UBRDIVSLOT and S3C_UART_HAS_UINTM.
This adds support for most
Signed-off-by: Alexey Galakhov <agalakhov@gmail.com>
Signed-off-by: Juergen Beisewrt <kernel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If DEBUG is defined it fails due to wrong variable names
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The netX internal UART latches register settings and internally uses
them only if written in the correct order. Other orders may work, but
sometimes the UART gets stuck, as the baudrate has not correctly been
set.
Signed-off-by: Michael Trensch <MTrensch@gmail.com>
Acked-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of directly accessing the struct member of struct param_d
use the provided getter function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some phys need board specific fixups. To be able to do this
from board code add mii_open/mii_close functions so that the
board can use the regular mii_read/mii_write functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently only 100Mb/s is tested. Freescale's U-Boot suggests that
there are some additional adjustments necessary for Gigabit support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Backport 2 fixes back from Linux kernel (title verbatim from
Linux kernel log) :
- docg3 fix in-middle of blocks reads
- docg3 reduce read alignment burden
These 2 enable partial reads from the MTD (ie. read only the
111 first bytes), which enable linux kernel booting or UBIFS
from barebox.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As per MMC spec, once power has been applied to an SD card, the card
can take as much as 250ms to complete its power-up cycle, and become
responsive to CMD0.
When this delay was not in place, activating the SD card in the env
init failed sometimes. With it, no more failure are observed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pxamci driver was not waiting for the BUSY line to be
deasserted. This was specifically breaking the CMD12 at
the end of block multiple writes, when the SD card had not
time enough to commit the last write.
Fix it by waiting for PRG_DONE bit (which is actually the
busy signal end condition).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pxamci requires a bit to be set in the command control
register when a CMD12 is sent. Set it, as required in the
PXA Developer Manuel, chapter "Stop Data Transmission
Command (CMD12 or IO/Abort with CMD52)".
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When preparing a command, apply a mask so that only the command part
will be used for the switch case. This will be more robust
for future command response types.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix clock handling accordingly to PXA manual :
- enable the MMC controller clock once and for all
- only disable the MMC bus clock when changing the MMCLK by
adjusting the clock ratio, else let the controller and SD
card shut down the clock as the see fit.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of using hard encoded values in the code, use defines to setup
the timeouts of reads/writes/commands.
Fix the read timeout as defined in the PXA Developer Manual.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently all devices have an id meaning that all devicenames
end with a number. This patch adds a DEVICE_ID_SINGLE to make
it ppossible to register a device without an id assigned to
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is based on the following U-Boot commit:
commit 5f4b4f2fed3ab8590c8c06b78642f8c1467acacf
Author: Vincent Palatin <vpalatin@chromium.org>
Date: Mon Dec 5 14:52:22 2011 -0800
ehci: speed up initialization
According to EHCI specification v1.0, the controller should stabilize
the power on a port at most 20 ms after the port power bit transition.
So, we put this setting in the virtual descriptor corresponding field,
(bPwrOn2PwrGood = 10 => 10 x 2ms = 20ms), this saves about 500ms at each
controller initialization/enumeration.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
for chache handling the ehci driver iterates over the hardware lists
of QHs/TDs. As we have a fixed number of maximum entries in this lists
we can allocate them as arrays and and clean/invalidate the arrays
instead which is much simpler. While at it, move the allocation to
ehci_probe so that we do not lose memory each time ehci_init is called.
Also, use memalign to allocate the QHs/TDs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also renamed config option name to MFD_MC13XXX.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The intel cfi buffer write has a problem with writing when
the alignment of the buffer in memory is smaller than the
flash bus width.
This patch fixes a alignment problem which may show during this
scenario:
- 32 or 64 attached NOR flash
- flashing an image directly from network to the nor flash
The involved network driver is "smc9111.c".
The data that comes from the network stack and should be written into
the flash isn't 32 bit aligned (at least with this network driver).
This is probably due to the 48 bit wide ethernet addresses.
However the "cfi_flash.c" driver doesn't handle this situation, and
accesses the not-aligned address with a 32 bit pointer.
This patch fixes the problem by reducing the access width if an
aligment problem between source and destination is found.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
'reduce the number of loops by the width of the port' means
a simple len / width. Do not try to be clever by shifting
and doing it wrong.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
drivers/usb/gadget/pxa27x_udc.c:1263:13: warning: 'pxa27x_change_interface' defined but not used [-Wunused-function]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ISP150x product line have same identifier, we can print these
chips as ISP150x.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since we do not have ISP1504-related functions, we migrated to ULPI.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Added ULPI detection function.
Same function from isp1504 driver removed.
Used implementation from Linux kernel.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These registers can be used for any standart ULPI chip,
not only for ISP1504.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Wait until the reset bit is actually cleared instead of some
arbitrary delay (which caused problems with a PHY which was in some
energy saving mode).
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
First check the status at least once, then do timeout checks. Minor
cleanups also.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We are already setup voltages from capabilities register.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for KS8851 16bit MLL chip from Micrel Inc.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When programming or erasing a page, don't wait
systematically for 3s, but finish the operation as soon as
the hardware has finished, and timeout if 3 seconds have
passed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Patch 2c54046510 introduces a private structure
for the S3C based UARTs but still reserves the memory for the smaller
structure which fails at runtime.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will ensure that we send an other packet only when the first one is send.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If a read or write operation encounters an error, the card
might stay in "recv" or "data" state, and never get back to
"tran" state.
In these cases, the host is required to send a CMD12 (end
transmission) to switch the FSM of the card back to "tran"
state, as described in MMC Specification, chapter "Data
Transfer Mode".
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Do not use dev->priv as a register base, but use a driver private
struct instead. Also, remove usage of dev->type_data
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We currently do not allow to unregister a device when it
has children. However, the return value is seldomly checked.
Also this breaks for hot pluggable devices like USB which we have
to unregister when they disappear. The best way to fix this is to
unregister our children and also the partitions on the unregistered
device.
We unregister the device first and then afterwards the children.
We do this because for example network devices have a miidev as
child which they unregister themselves. So we only have to
unregister the children which are not cleaned up by the drivers,
namely fs devices.
Also, unregister all partitions on a disappearing device.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As pxafb can rely on a PWM to control backlight, and because
driver dependencies are hard to deal with, remove automatic
enable of PXAFB on probe.
The user should in its environment do a :
- fb0.enable=1
This way, the PWM has been probed and is ready to work, and
the pxafb backlight control works.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add PXA embedded pulse width modulator support. The PWM can
generate signals from 49.6kHz to 1.625MHz.
The driver is for pxa2xx family. The pxa3xx was not handled yet.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add variables to control the duty_ns and period_ns of PWM
chips. When these variables are set, a call to either
pwm_enable() or pwm_config() is performed to enforce the
setup values.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Juergen Beisert
Christian Kapeller
Jan Luebbe
Sascha Hauer
Eric Bénard
Johannes Stezenbach
Wolfram Sang
Roberto Nibali
Antony Pavlov
Alexey Galakhov
Alexander Shiyan
Krzysztof Halasa
Jean-Christophe PLAGNIOL-VILLARD
Michael Trensch
Robert Jarzmik
Uwe Hermann
Marek Belisko
Jan Weitzel