The i.MX gpio driver doesn't have dependencies, so initialize
it in a core_initcall to have the gpio functions available earlier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This moves the CCM drivers to core_initcall since this has no dependencies.
This way we can be sure that the clock for the clocksource is available in
at postcore_initcall time.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The same value as used in Mainline and Freescale U-Boot. This might
increase the stability of i.MX51 boards. The 5:1 ratio we have in barebox
probably goes back to copy/paste from the i.MX53 code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adjusting the PLLs when MMU/caching is already enabled seems to be
unstable on the Smartbook, so do it during early init.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imx_silicon_revision() can't be used from early init context, so
use imx51_silicon_revision() instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The IROM is located at physical address 0x0, so reading the
silicon revision from it leads to a NULL pointer dereference
if done too late when the MMU is already enabled. Use the IIM
instead which is also done in the Kernel. This limits the silicon
revisions to 2.0 and 3.0, but I assume the earlier versions are
not seen in the wild anyway.
This also moves the call to imx_set_silicon_revision() out of
imx51_silicon_revision() so that imx51_silicon_revision() can be called
in early init context.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Kernel does not have pinctrl driver for i.MX27 yet. When we using DT,
this cause to unable setup pins to desired function. This patch adds
a setup for MC13783 IRQ pin to avoid this issue.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This breaks HSIC and has no good justification why this would
be needed for ULPI.
This reverts commit 2e7d66f526.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards need some more tries to successfully detect a phy. This
happens for example on the pcm038. Try up to four times to detect a
phy.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This settings taken from original DIGI U-boot source code.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without this patch the chipidea driver reports 'No supported role'
during runtime.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Patch will help to develop user devices connected to module, so
user can operate GPIOs in barebox console.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In omap4_enable_all_clocks we not only enable the mcbsp clocks, but also
change the source from ABE_24M_FCLK to 24M_FCLK. Revert this and default
to the reset state.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes boot_mode detection for non-internal boot and
bootsource detection for i2c boot. Further, the bootsouce_instance
is now determined for spi, i2c, and mmc/sd boot.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This new memtest can test the whole unused memory. The new memtest
command try to request the whole unused sdram regions on all banks and
run the mem_test routine from common/memtest.c on it.
The memtest command has only two parameters;
-i Amount of iterations, default 1, iteration of 0 is endless.
-b Set this to skip integrity check.(Do only a fast test for bus lines)
If MMU support is enable, memtest try to run memtest twice. The first with
cache enabled, the second with cache disabled.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Our driver matches stmpe-i2c and stmpe-spi. It seems the device
we really support is the stmpe1601, so use this one for matching
the devicetree compatible.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Our erase command used to align to eraseblocks when necessary.
This worked well until recently when the m25p80, mtd_dataflash
and cfi flash were added / converted to mtd. This patch aligns
the input to the erase fileoperation to eraseblock boundaries.
Also tested with non uniform flashes with multiple eraseregions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We need ata_id_has_lba48() in another C file, so move
the ATA_ID_* stuff to include/ata_drive.h like in the Linux
Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add mem_test routine. Useful to detect timing problems if someone
porting a new device to barebox. This test includes a data bus test,
address bus test and integrity check of memory.
This mem_test routine has as parameter start and end address of testing
space. The last parameter can skip the integrity check.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Linux normally has no idea how to retrieve MAC Addresses, but instead
expects the MAC address in the devicetree. This patch adds the MAC
address to the devicetree for Linux if we find a valid one in barebox.
This mechanism is limited of course to devices barebox has a driver for
and which are probed themselves from the devicetree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is mainly a backport of the imx6_revision function of
arch/arm/mach-imx/mach-imx6q.c in the linux kernel sources.
Signed-off-by: S. Fricke <sfricke@data-modul.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
By default CONFIG_JZ4750D_DEBUG_LL_UART0 is selected.
This can confuse the Ritmix RZX50 user as the board
has only UART1 connected.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit moves the C debug_ll code from
the MIPS <debug_ll_ns16550.h> header file to
the MIPS <asm/debug_ll_ns16550.h> header file,
so the C code and the asm code can use the same
register address macros.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Set fake DEBUG_LL_UART_DIVISOR to use <asm/debug_ll_ns16550.h>.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Set DEBUG_LL_UART_DIVISOR to use <asm/debug_ll_ns16550.h>.
The JZ4755 uses 24 MHz as the main reference frequency (EXCLK).
The UART controller can work on full EXCLK or on EXCLK/2.
Just now we use EXCLK/2 legacy clock setup made by U-Boot.
So set UART controller base frequency to 12 MHz.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In devinfo for the card also print:
- capabilities for host and card
- current bus width
- current clock
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use MMC_CAP_ names instead of MMC_MODE_. This makes it more
clear that these are capabilities of host/card and do not refer
to the current mode. These are in line with the Linux Kernel
except for MMC_CAP_MMC_HIGHSPEED_52MHZ which could be fixed
later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Alexander Shiyan
Lucas Stach
Jan Weitzel
Markus Niebel
Philipp Zabel
Alexander Aring
Antony Pavlov
S. Fricke
Masaki Muranaka