The mips_barebox_10h macro inserts at offset 0x10
of the barebox image the string 'barebox ' followed
by compile time version mark.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Remove Shinya Kuribayashi's copyright on the ADR macro
in start-pbl.S as we don't define this macro in
this file or even use it where.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The generated label usage make possible
to use the ADR macro many times.
If we don't use a generated label and we try
to use the ADR macro second time then we get
Error: symbol `_pc' is already defined
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have the LONGSIZE macro definition in <asm/asm.h>.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
By default CONFIG_JZ4750D_DEBUG_LL_UART0 is selected.
This can confuse the Ritmix RZX50 user as the board
has only UART1 connected.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit moves the C debug_ll code from
the MIPS <debug_ll_ns16550.h> header file to
the MIPS <asm/debug_ll_ns16550.h> header file,
so the C code and the asm code can use the same
register address macros.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Set fake DEBUG_LL_UART_DIVISOR to use <asm/debug_ll_ns16550.h>.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Set DEBUG_LL_UART_DIVISOR to use <asm/debug_ll_ns16550.h>.
The JZ4755 uses 24 MHz as the main reference frequency (EXCLK).
The UART controller can work on full EXCLK or on EXCLK/2.
Just now we use EXCLK/2 legacy clock setup made by U-Boot.
So set UART controller base frequency to 12 MHz.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds macros for ns16550 port initialisation
and single char output. The macros can be used in
MIPS asm pbl code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Ingenic JZ4755 SoC (JZ4750D family) has three UARTs.
So we can give to the user choose which one of them
to use for low level debug (debug_ll) output.
Also this commit adapts the only JZ4755 board
(Ritmix RZX50) for using the new debug_ll port
selection.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In barebox we have no CONFIG_MIPS_MT_SMTC Kconfig option.
So remove the code under this macro.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also enable the iomem and poweroff commands.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Ingenic JZ4740, JZ4755 and JZ4770 SoCs use
the same IP core for UART interface. This IP core
is NS16550-compatible, but it needs small workaround.
This commit moves the UART code for Ingenic SoCs
from board level to machine level. So the code
can be reused for different boards or even
different SoCs.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On MIPS there are two segments in CPU address space that
can be used for untranslated memory access: KSEG0 and KSEG1.
KSEG0 is used for cached access and KSEG1 is used for
uncached one.
The instroduced mips_add_ram0() function registers two
address regions for memory access: one in KSEG0 and
the other one in KSEG1.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add barebox-data section in arm branch to get complete
barebox regions in sdram regions tree.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Change function remap_range in arm architecture to make it
global accessable. For example command 'memtest' can change
pte flags to enable or disable cache.
Add dummy function for others architectures that doesn't
have mmu or pte support.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Trivial pbl support has no cpu specific setup.
We will add cache setup routines in the future.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is based on ARM pbl support and allows
creating a pre-bootloader binary for compressed image.
For different MIPS SoCs (or even for different boards based
on the same SoC) the operations carried on in start-pbl.S
can be very different. The additional constraints can be imposed
on the size of the boot code or the special magic labels in
the beginning of the boot code; In some cases it could be
necessary to show CPU is alive as early as possible
(transmit a char via UART or blink a LED).
So the demands for pbl start operation can be very different.
E.g. malta board store boot code at the NOR flash mapped
to the MIPS power-on address (0xbfc00000); it is the most
simple case: we need just copy pbl image from direct-mapped
flash to RAM and jump there.
The XBurst-powered boards store boot code in the beginning
of a NAND flash or in the beginning of SD/MMC card.
In this case we must use simple and short NAND or SD/MMC access
routines to copy pbl image to RAM.
To meet so different demands a simple technique is selected:
* MIPS pbl entry point located in file arch/mips/boot/start-pbl.S.
* MIPS pbl code (see start-pbl.S) assumes that every pbl-enabled
board has a arch/mips/boards/<BOARD>/include/board/board_pbl_start.h
header file. This file must contain definition of
the board_pbl_start macro. This macro is used as start of pbl image;
* the most popular asm routines (stack setup, relocation to link
address, NS16550 initialization (WIP) and so on) are containt
in the arch/mips/include/asm/pbl_macros.h header file.
So board pbl macro can use it if necessary.
It is possible to create similar headers with macros for each
specific SoC; so even if we have many different boards based
on the same SoC the board_pbl_start macro for every board
can be short and clear.
* after board-specific initialization the stack pointer
is initialized and pbl C code is started.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format, removing
extraneous lines and spaces. No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
putc already is a regular barebox function. To avoid conflicts and
confusions just let architectures define PUTC_LL directly instead
of going through this addiotional redirection.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The commit
commit d25d94bea6
Author: Antony Pavlov <antonynpavlov@gmail.com>
Date: Fri Jun 1 13:23:20 2012 +0400
MIPS: make possible board-specific header files
This patch makes possible to put a board-specific
header file (e. g. foobar.h) to arch/mips/boards/*/include/board/.
breaks the out-of-tree build for the boards that use it (rzx50).
Reported-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mips currently uses local_irq_save and local_irq_restore
which are not defined. Drop them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Antony Pavlov <antonynpavlov@gmail.com>
Depending on the SoC a barebox.bin, barebox.netx, barebox.s5p, MLO image
is generated. With pbl support there now is an additional
arch/arm/pbl/zbarebox.bin image.
To help the user to determine which image should be flashed to his device,
generate a barebox-flash-image link.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Some drivers call dma_inv_range() on buffers, on arm these buffers must
be cache line aligned. This patch introduces a generic dma_alloc,
dma_free. Archs can implement in their own functions in "asm/dma.h" and add a:
#define dma_alloc dma_alloc
#define dma_free dma_free
On all other archs the generic versions, which translate into xmalloc
and free are used.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The 40 KHz frequency value was used to parry
__lshrdi3() error on little-endian MIPS because
the __lshrdi3() function is used in clocksource code.
The true value of the JZ4755's external clock frequency is 24 MHz.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the commit 40492a0c13
(MIPS: add common header file for DEBUG_LL via NS16550)
introduced common DEBUG_LL via NS16550 for MIPS
(see file arch/mips/include/debug_ll_ns16550.h).
In the commit 1cbe2b2c00
(MIPS: XBurst: add Ritmix RZX-50 board support)
the file debug_ll_ns16550.h used in
the file arch/mips/mach-xburst/include/mach/debug_ll.h.
Usage looks like this:
------------------------------------------------
+#ifdef CONFIG_BOARD_RZX50
+#include <mach/debug_ll_jz4755.h>
+#endif
+
+#include <debug_ll_ns16550.h>
------------------------------------------------
So after adding another board (e.g. A320) we will have something like this:
------------------------------------------------
#ifdef CONFIG_BOARD_RZX50
#include <mach/debug_ll_jz4755.h>
#endif
+#ifdef CONFIG_BOARD_A320
+#include <mach/debug_ll_jz4740.h>
+#endif
#include <debug_ll_ns16550.h>
------------------------------------------------
This approach has disadvantage:
* the files mach/debug_ll_jz4740.h and mach/debug_ll_jz4755.h
(they go to arch/mips/arch-xburst) are __BOARD-SPECIFIC__
(not SOC- or mach-specific!); The file mach-xburst/include/mach/debug_ll.h
is outside board directory, but it contains some board related information.
This commit introduce a more suitable solution.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch makes possible to put a board-specific
header file (e. g. foobar.h) to arch/mips/boards/*/include/board/.
Header file usage:
#include <board/foobar.h>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as the garbage collector will remove the empty function and the
add_ns16550_device is a empty inline if the driver is not enabled.
This will simplify add device adding.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fixes:
arch/mips/lib/lshrdi3.c:6: warning: no previous prototype for '__lshrdi3'
arch/mips/lib/ashrdi3.c:6: warning: no previous prototype for '__ashrdi3'
arch/mips/lib/ashldi3.c:6: warning: no previous prototype for '__ashldi3'
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this allow to check we do not exceed the size of the SRAM as example
introduce BAREBOX_MAX_BARE_INIT_SIZE the maximum size of bare_init
this will allow your bare_init will fit in SRAM as example
ARCH can overwrite it via ARCH_BAREBOX_MAX_BARE_INIT_SIZE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The only supported peripheral is ns16550 serial port.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The machine uses only big-endian mode.
Only supported peripheral is serial port.
The machine supports only MIPS32 CPUs.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Oleksij Rempel
Antony Pavlov
Alexander Shiyan
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD
Alexander Aring
Marc Kleine-Budde