The FSF address has changed; The FSF site says that
address is
Free Software Foundation
51 Franklin Street, Fifth Floor
Boston, MA 02110-1301
USA
(see http://www.fsf.org/about/contact/)
Instead of updating it each time the address changes,
just drop it completely treewide.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Kconfig and make files are updated to build the Freescale P1022DS
image.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The eTSEC 2.0 devices found on the 85xx family of SoCs support stashing
buffer descriptors in the L2 cache. This updates the device tree fixup
for these devices to ensure that the stashing related properties used
by Linux are initialised correctly.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the Freescale P1022DS. Driver support is limited to:
- I2C
- Ethernet
- Serial
- NOR flash
- PIXIS FPGA
System clock configuration is read from the FPGA but has only been
tested using a 133MHz system clock and 100MHz DDR clock.
Boot arguments are defined in the environment to boot over NFS with
a console configured at 115200 bauds.
Enabling branch prediction is moved from board support to the platform
support for all boards as it is a CPU feature.
Some the code is from U-Boot version git-be937b5.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add DDR3 SPD verification support for use by the PPC 8xxx DDR driver.
This is based on the equivalent files from U-Boot version git-be937b5.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CPU, DDR, and LBC definitions are added to support the Freescale P1022.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable memtest, MMU and iomem support on the P2020RDB and DA923RC.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support to enable caching on a memory region during the memory test.
Tested on P2020RDB and DA923RC.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Memory regions on MPC85xx boards are incorrectly defined leading to
corruption when running memory tests. This patch updates the memory
layout of MPC85xx boards so that critical memory regions can be
correctly reserved during the memory test.
Tested on the P2020RDB and DA923RC.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix the chip select configuration register offset increment and summing
of bank size so that, for chip select index greater than 0, barebox can
determine the total memory size from enabled banks.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Removed the ppc bit operation functions and definitions in the ppc
file asm/bitops.h since these are already defined in the asm-generic header
files. Moved ffs64 definition to the mpc85xx header files because
the function requires the inclusion of linux/log2.h which also includes
asm/bitops.h.
The conflict was noted when UBIFS was enabled in barebox.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Import U-Boot start-up code from version git-9407c3fc to include the
latest CPUs errata and make future U-Boot code inclusion easier. The
code import is limited to the currently supported CPUs P2020/MPC8544.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The linker script and start up code are updated so that the bss
section is located above the barebox binary in memory. This removes
the reliance on a hard-coded value.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Updates to use a common linker script for all mpc85xx boards,
avoiding duplication.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The clock frequency property of the device tree node fsl,mpic is
added as it is needed by the PCI driver to function in newer
Linux version.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format.
No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the Kconfig and Makefile directives to build barebox
for the GEIP DA923RC board.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The use of the DDR driver as well as early I2C support is
enabled for board initialising their memory through SPD EEPROM
data.
A SOC specific function returning the DDR bus frequency
is added for the DDR driver to translate DDR timings to
register values.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Because the port count is different between the MPC8544 and
existing CPU support, the Ethernet port count is defined on
a per CPU basis.
Accordingly, the TBI PHY initialisation code is updated.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Definitions are added to support the mpc8544 sOC.
The function returning the I2C bus frequency is updated
to take into account the mpc8544 specific clock ratio.
A mininal GPIO API is added to enable and set the GPIO
out pins.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If drivers want to fixup their specific instance they need some context
to know which instance they have to fixup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for populating derived properties of the mpc85xx SOC
which are not typically included in the dtb directly.
This update is based on U-Boot code from common/fdt_support.c
and arch/powerpc/cpu/mpc85xx/fdt.c - version git-2b26201.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With multiboard support the compiletime generated BOARDINFO string
gets more and more meaningless. This removes it from Kconfig and
replaces it with a variable that can be set at boardlevel.
Also many boards have a standard setting for the hostname in the
environment. This patch also moves the standard to C code by calling
barebox_set_hostname().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The early initialisation of chip select 0 (boot flash) is removed
from cpu initialisation. This removes the dependency on board
base address definition.
Consequently, cpu_init_f is not called in the start-up code but
added to the init call list as cpu_init_r. Also the file
arch/ppc/mach-mpc85xx/fsl_lbc.c is deleted.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Early I2C support is introduced to read SPD data from memory
modules prior to the loading of the I2C driver.
This code is based on the equivalent file fsl_i2c.c in directory
drivers/i2c from U-Boot version git-a71d45d.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit creates MDIO bus devices to separate the MDIO bus
abstraction from the Ethernet device initialisation.
It also updates the configuration of the P2020RDB ports.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format, removing
extraneous lines and spaces. No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The end boundary of each registers set may overlap with the start
of the next register set. Subtract 1 to the end boundary.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A function to calculate the frequency divider and digital filter sampling rate
for the 85xx processors is added to the i2c-imx driver. Hence, this driver is
usable on IMX and 85xx machines.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to use the IMX i2c driver on the mpc85xx SOC, the file mach/clocks.h
is renamed mach/clock.h. Files using this header are updated accordingly.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A function that returns the system bus frequency used to compute the i2c bus
frequency is added for future use.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The fsl_eth_init function maps the TSEC registers (MAC, TBI and
external PHY access registers). It also passes the PHY address and
TBI registers initialization values.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This update adds the GIANFAR driver along with the configuration
and build files.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In view of the introduction of the GIANFAR Ethernet driver,
the mdio and gianfar base address are defined.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds initialization functions used by the e500v2 start-up code
and board specific code (L2 cache initialization).
Other functions help identify the CPU or return the programmed memory size.
Finally, the Makefile and Kconfig file are added.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch contains functions that returns information on
the CPU and buses frequency (LBC, DDR, system).
It also includes the clock source driver.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch includes functions to initialize LAW registers and
the chip select 0 of the CPU.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These header files are added to provide a minimal support to the
Freescale 85xx cpu to boot on a P2020RDB platform.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Antony Pavlov
Renaud Barbier
Sascha Hauer
Alexander Shiyan
Jean-Christophe PLAGNIOL-VILLARD