The barebox specific properties have not been applied as
the TQMa53 overlay DT has not been included. Fix this.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The HABv3 images for engineering mode do not work on a production device
and the images for production mode do not work on an engineering device.
When in engineering mode the ROM checks the images, but does not stop
booting when the signatures are wrong. This means a production image
can still be booted on an engineering device. This device can be
temporarily put into production mode by writing to the HAB_TYPE shadow
fuse register. After a reset the device will come up in production mode
and the image can be tested for validity. This means that if we have to
decide between production mode images and engineering images, the
production images are a better decision. Change this accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a function to enable/disable permanent write for the IIM
module so that C users no longer have to fiddle with device parameters.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Accessing the IIM registers is cumbersome. The fuses are documented with
different register strides and there is no header file available, so the
different fields have to be read in the datasheets and translated into
the barebox format over and over again. This patch adds a header file
which has defines for the various fuses (for i.MX25 only so far, but
others can be added later) along with C functions to read/write the
fields.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
bootm has a C API, so the bootm options have to depend on the
option providing the bootm code (CONFIG_BOOTM), not on the
option providing the command (CONFIG_CMD_BOOTM). Fixing the
dependencies makes it possible to fully use bootm from C without
enabling the bootm command support.
This also removes the CMD_ prefix from the options which means
we have to update the defconfigs aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rename the already global array of default memory settings to make the
intended usage more obvious.
Also make generous use of the const keyword.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For the phyCORE-i.MX6 add an automount command for the first partition
on the eMMC device.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable NOR for phyCORE-i.MX6 DualLite and Quad eMMC variants.
Furthermore add an extra 'status = "disabled"' in the flash node. It
has no functional effect, because the SPI bus node 'ecspi1' is disabled,
too.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some phyCORE-i.MX6 variants have eMMC instead of a NAND chip. Provide an
update_handler for them.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The extra environment folder for the phyCORE-i.MX6 had the suffix
'-mira'. That's the name of a baseboard. Since the bootloader is generic
for all baseboards, use a generic suffix for the environment folder.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update RAM calibration values in the flashheader file for phyCORE-i.MX6
DualLite/Solo. These are verified and tested in the climatic chamber for
commercial, extended commercial, industrial and automotive i.MX6
variants.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The phyCORE-i.MX6 has either a NAND or EMMC storage device and an
external SD-Card interface. The automatic bootsource detection in the
barebox environment should reflect that.
- If the board was booted from the external SD-Card interface, it should
continue loading the kernel and device tree from it.
- If the board was booted from EMMC, it should load kernel and device
tree from the boot partition on the EMMC.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add missing MMC barebox environment partitions for the phyCORE-i.MX6
with EMMC. Otherwise the barebox cannot find the environment, when the
board is boot from sd-card.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use a longer reset time for ethernet phy Micrel KSZ9031RNX. Otherwise a
small percentage of modules have 'transmission timeouts' errors like
barebox@Phytec phyFLEX-i.MX6 Quad Carrier-Board:/ ifup eth0
warning: No MAC address set. Using random address 7e:94:4d:02:f8:f3
eth0: 1000Mbps full duplex link detected
eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Due to hardware issues the usdhc3 interface on phyBOARD-ALCOR i.MX6 and
phyBOARD-SUBRA i.MX6 doesn't work reliable at 50Mhz. You get
communication errors like
barebox@Phytec phyBOARD SUBRA:/ ls /mnt/mmc/
mmc2: detected SD card version 2.0
mmc2: registered mmc2
imx-esdhc 2198000.usdhc: timeout 2
mmc2: Cannot read MBR/partition table
Therefore reduce the maximum clock speed to avoid these problems.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for phyBOARD-SUBRA-i.MX6 with phyFLEX-i.MX6 Quad 1GiB on one
bank. This patch factors out the common device tree nodes for the Quad
and Solo variant into 'imx6qdl-phytec-phyboard-subra.dtsi'.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable the mmc_extcsd command to read and write MMC/eMMC registers.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
After doing a 'saveenv' command, it is no longer possible to boot.
The reason for this behaviour is that the 'barebox' partition has
currently
a size of 0x80000 (512 kB), which is not sufficient to store the barebox
binary. This causes the 'barebox' and 'barebox-environment' partitions
to overlap.
Fix this problem by increasing the size of the 'barebox' partition and
by placing the 'barebox-environment' right after it.
This patch increases the barebox partition for all i.MX boards to
0xe0000
Reported-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The LT variant has a different compatible, yet we want to run the
code on this variant aswell. Add the corresponding test.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Partition names shouldn't be continuously numbered, instead the part
behind the '@' should match the reg property. Fix this for all ARM
device trees.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
CONFIG_FITIMAGE is the variable to depend on, not
CONFIG_CMD_BOOTM_FITIMAGE which is only a wrapper option to
let CONFIG_FITIMAGE select from the bootm Kconfig menu.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes memory detection on the Digi ccxmx53 board.
Also updates dts to support nand.
Cleaned up whitespace?
Signed-off-by: Jason Cobham <cobham.jason@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The callers of get_kernel_addresses() are not interested in the
spacing after the kernel image, they are interested in the
place where they can put device tree and initrd, so pass
a pointer to mem_free to get_kernel_addresses().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move the call to sdram_start_and_size() into get_kernel_addresses() and
remove the now unnecessary parameter mem_start.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
fixes: 81737c1 mtd: Fix erasing of devices >4GiB
Several places erased a complete flash partition passing ~0 as count to
erase(). With the above commit count to erase was changed from an unsigned
type to a signed type, so the (count > f->size - offset) check in
erase() no longer triggers and the ~0 count is no longer adjusted to the whole
device size. Among other things this results in saveenv failures on NOR
flashes.
This patch fixes this by introducing an explicit macro for erasing the
whole device which is tested for in erase(). All other negative values
are rejected.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reported-by: Giorgio <giorgio.nicole@arcor.de>
The function we have implemented as getc has the semantics of the
standard function getchar, so rename it accorgingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Our asprintf and vasprintf have different prototypes than the glibc
functions. This causes trouble when we want to share barebox code
with userspace code. Change the prototypes for (v)asprintf to match
the glibc prototypes. Since the current (v)asprintf are convenient
to use change the existing functions to b(v)asprintf.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Allows this code to work correct regardless of the used compiler
optimizations.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This has no users and seems to be untested. Removed it.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In v4.2-rc3 the "fsl,imx1-gpt" compatible was replaced with
"fsl,imx21-gpt" so i.MX27 currently ends up without clocksource. Fix
this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The binary image generated by barebox contains an instruction at the
very beginning to jump over the header. However, when the image is
written to a SD card and the first 512 bytes are skipped in order to
preserve the partition table then this jump instruction is lost. Instead
of relying on the jump instruction at the image beginning calculate
the image entry from the i.MX header instead of relying on the beginning
of the image being the entry point.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All i.MX images are nowadays built with the imx-image tool, so we do not
need the header files and Kconfig options anymore. Remove them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX6 a single chipselect can have 4GiB. In this case the calculation
for CS0_end overflows the 7 bit field. Clamp it to 127, the maximum
supported value.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX6 a single chipselect can have 4GiB, which overflows a 32bit
type, so imx6_mmdc_sdram_size() must return a u64 to support this case.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current vector table setup has some shortcomings. First of all
currently the case when the high vectors are inside SDRAM (that is,
SDRAM reaches the end of the address space) is not supported. In this
case we create a secondary page table for the section containing the
vectors which gets overwritten by the general SDRAM secondary page
table entries creation afterwards. On ARMv7 and later the exception
table setup can be improved: Here the vector table address is configurable
in the VBAR register. We can use this register to skip remapping the
vector table.
With this patch we first try to use the VBAR register before doing
something else. Also, when we have to use the high vectors we first
try a request_sdram_region to test if the vector table memory is already
mapped. While at it sprinkle some comments into the code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The last 64KiB of address space may be used for the vector table at
0xffff0000, so we cannot use it for barebox. The easiest way to archieve
this is to never use the last 64KiB of memory.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When SDRAM reaches to the end of the address space the comparison
membase + memsize evaluates to 0, so pc - membase < memsize can never
be true. Fix this by substracting membase on both sides of the
comparison.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CCM has reset status bits with more detailed information than the
watchdog. Set reset source with higher priority.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to commit f6b6f3c7b2bb7d6277801882afdced6f2b10fc17 from
git://git.freescale.com/imx/uboot-imx.git:
Also set Prefetch offset to 15, since it improves
memcpy performance by 35%. Don't enable Incr double
Linefill enable since it adversely affects memcpy
performance by about 32MB/s and reads by 90MB/s. Tested
with 4K to 16MB sized src and dst aligned buffer.
This commit ports those chagnes from U-Boot.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I.MX6Q Plus parts have r3p2 revision of PL310 so double linefill
errata no longer applies for all of the i.MX6Q SoCs. Change the code to
use PL310's revision inforation to determine if workaround needs to be
applied.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use constants instead of magic numbers for PL301 registers bits in
imx6_mmu_init()
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In v4.2-rc3 the "fsl,imx1-gpt" compatible was replaced with
"fsl,imx21-gpt" so i.MX27 currently ends up without clocksource. Fix
this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Call clk_enable on mmdc_ch0_axi_podf in order to properly increase
reference counters for all of the nodes in this particular clock
path. Otherwise it becomes possible for peripherals, located on other
branches stemming from "periph", to shut down the whole clock tree (up
to "pll2_bus") when they try to manage their own local clocks.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make sure that Barebox specific .dtsi files are included after .dtsi
files imported from Linux kernel. This way those local .dtsi files can
reference phandles defined in Linux kernel files.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The power button is not part of the CPU module and can be triggered
wrongly on other baseboards. Disable it since we do not need it
currently.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The TX6 boards come with 3 different PMIC variants from which we
currently only support the ltc3673. Detect the other two by i2c
address and set them up correctly. The code is based on the karo
U-Boot port.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a re-application of fix 17644b55.
arm_cpu_lowlevel_init() will set the processor mode to 0x13 (supervisor).
When this function is entered via a different processor mode, register
banking will happen to lr (r14), resulting in an invalid return address.
This fix will preserve the return address manually.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The device tree for the 801x variant only contains displays. The
displays are not part of the SoM, but instead of the baseboard,
so they should be described in a baseboard dts. With this patch
we rather include the common tx6x dtsi file and drop 801x from
the barebox device tree names.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX6q variant is basically the same as the i.MX6dl variant, just
with another SoC and the usual i.MX6q/i.MX6dl adjustments.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The TX6 board come with either NAND flash or eMMC as primary
storage medium. This adds support for the eMMC variants.
We can detect if we have NAND or eMMC by looking at the
bootsource which will be configured accordingly. This
way we can modify the device tree during runtime and do
not have to create a new image.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The stuff we currently have in the i.MX6q dts file can be reused for
the i.MX6dl variants, so factor out a common dtsi file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Remove the fixed malloc area size from the defconfig and allow
barebox to calculate the size dynamically.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Upstream has dropped those from the base dtsi, as long as we can't
fully switch to the upstream board DT add the correct alias to the
barebox copy.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
v7: eof whitespace fixes
A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign
Signed-off-by: Tim Sander <tim@krieglstein.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since 253fb33 (input: gpio-keys: convert to input framework) the
gpio-buttons are registered with the input framework which has the
side effect that they are activated during boot and no longer have
to be activated manually by activating the input device console.
This reveals that the gpio-button polarities are wrong: The autoboot
is no longer running through since a gpio button press is wrongly
detected.
Fix the polarities in the barebox dts for now to get back a working
board. A proper fix has been sent upstream to the kernel. Once this
has landed and propagated back to barebox this patch can be reverted.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When the kernel load address is chosen by the user/image we need
to check if the kernel needs to relocate itself before decompression.
If that's the case the spacing behind the kernel must allow for this
relocation without overwriting anything placed behind the kernel.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of having the same logic for uImage and zImage types duplicated
in the code, split it out into a separate function. This does not change
the behavior of the calculation.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tabs in kconfig help text will create unwanted indention artefacs when
the help text is scrolled horizontally. Replacing tabs with spaces.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The evaluation boards EDB9302 and Olimex-CS-E9302 both use a
KS8721BL transceiver in default strapping which is phy_addr=1
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use ARM_USE_COMPRESSED_DTB for all AM335x based board,
to reduce the image size even more.
Saves about 9kB in MLO image and 20kB in barebox image.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reduce even more size of beaglebone MLO device tree with stripping
the clocks.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use eeprom as name like in the kernel. This is needed if you use the
state framework.
phycard: also fix index, it has address 0x54
Signed-off-by: Jan Remmet <j.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since commit 764ae1647c ("ARM: i.MX: Add correct SoC type detection
for i.MX6") the definition of the function cpu_is_mx6q and cpu_is_mx6dl
has changed. Before that change they match the SoM family Quad/Dual and
DualLite/Solo. After that change they are SoM specific. They match only
Quad and DualLite. There are extra functions cpu_is_mx6d and cpu_is_mx6s
for SoM Dual and Solo.
We have not seen any real world consequences of this problem yet.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since commit 0ff58575c9 ("dts: update to v4.5-rc1") the compatible
"fsl,imx6q-gpt" was removed from imx6dl.dtsi. Now there is only the
Solo/DualLite specific compatible "fsl,imx6dl-gpt". Adapt the driver
for that change.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The cpu_is_mx6* function for the i.MX6 Solo was missing. All other
functions are already defined.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of returning an error when a locked region is read, fill
the result with 0xbadabada to indicate a locked region is read.
This way a md -s /dev/imx-ocotp does not abort when it encounters
locked regions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Throughout our codebase the private context pointer is the first
argument to a function. Do this for the ocotp driver aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Even when the control register has offset 0x0 it's still nice
to use a register define for it. Accessing priv->base directly
just looks wrong.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All i.MX6 SoCs except the i.MX6SL have 4kbit fuses. The i.MX6SL has
2kbit fuses. Fix the device size accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Pass the config file to cmd_imx_image as arguments to make it more
flexible. Also add the possibility for another arg containing additional
options.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The imx-image tool can now generate signed images itself, so we can
switch to this mechanism:
- Move the CSF templates to header files which can be included by the
flash config files
- remove images/Makefile.imxhabv4 which is no longer necessary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There's not only HABv4 but also HABv3. No need to put the corresponding
code in separate directories, so rename the habv4 directory to hab.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For signing i.MX images with HABv3 we need several certificates. Add
their pathes to Kconfig variables to make them available to the build
system.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This implementation is inspired by U-Boot's FIT support. Instead of
using libfdt (which does not exist in barebox), configuration signatures
are verified by using a simplified DT parser based on barebox's own
code.
Currently, only signed configurations with hashed images are supported,
as the other variants are less useful for verified boot. Compatible FIT
images can be created using U-Boot's mkimage tool.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In barebox the function digest_alloc() allocates a digest based on a string.
When a subsystem already uses an integer value to identify a digest it makes no
sense to create a string and pass it to digest_alloc(), where it is parsed
again. This patch adds the possibility to get a digest by an enum.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The initrd code is distributed in several places in the bootm code.
Move it all together in bootm_load_initrd().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We can make the dryrun option more useful by calling into the handlers.
With this we can detect more cases that can go wrong during boot.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Setting a fixed memory size prevents from using the different board
variants with different memories equipped.
barebox is able to read RAM size informations from the imx53 RAM
controller and thus does not require this information passed via dts.
Signed-off-by: Enrico Jorns <ejo@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Setup the plls with Master Osc. clock speed from the SYSBOOT
Configuration Pin.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move the function to read the Master OSC speed from
the SYSBOOT Configuration Pin for reuse.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently only second stage booting from the vendor U-Boot is tested. I
don't want to flash barebox into NAND yet because UART-booting for
recovery doesn't work for me.
Working so far are:
- UART
- networking
- nand flash
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Lucas Stach
Alexander Shiyan
Andrey Smirnov
Uwe Kleine-König
Stefan Christ
Christian Hemp
Jan Remmet
Du Huanpeng
Jason Cobham
Teresa Remmet
Lucas Stach
Alexander Stein
Alexander Kurz
Tim Sander
Arnd Beuscher
Wadim Egorov
Steffen Trumtrar
Jan Luebbe
Enrico Jorns
Daniel Schultz
Uwe Kleine-König
Philipp Zabel