The cm-fx6 board is a module from Compulab with different i.MX6 SoCs.
This module is also found in the Utilite Mini Computer this patch
also adds support for.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for all possible combinations of phyFLEX-AM335x modules.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for all possible combinations of phyCORE-AM335x
modules.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Added support for IM8G16D3FBBG15EI 1024MiB RAM on one chip.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards like to do their SDRAM setup in code rather than in hardcoded
DCD tables. For these boards the bootloader has to be loaded to the internal
SRAM which is often too small for a full featured barebox. This new SRAM
image type target allows to overcome this limitation. The image created
with the new imx-sram-img rule is a regular imx-image with the difference
that the load size only spans the pblx image and not the whole image including
the payload. The pbl image easily fits into SRAM. The strategy is that this
initial code initializes the SDRAM, loads the whole image to SDRAM and jumps
to it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This enabled multi image support for the Garz&Fricke Vincell board. Also
it adds the Vincell-LT as a second image with a separate device tree.
Previously we used the same image on both the Vincell and the Vincell-LT
image since the differences are not that significant for barebox. Still
this was good for quite some confusion internally, so let's properly
introduce a second image.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Breathe some life back into the beagleboard:
- switch to multiimage support
- update config
- initialize early UART for debugging
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit add a very basic code to allow Barebox to be booted from
IRAM. Given that the amount of IRAM on most i.MX variants is
insufficient to contain a copy of Barebox with any reasonable degree
of functionality this code uses IRAM only as a temporary location and
eventually bootstraps from DRAM. But the presense of the intermediate
IRAM-only stage allows to add provisions to test the area of DRAM that
Barebox would be using to facilitate various testing scenarious.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for Marvell Armada XP based 4-bay NAS Lenovo
Iomega ix4-300d.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Before adding new Armada XP based boards becomes messier than necessary,
sort Armada XP based board Kconfig and image Makefile alphabetically.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds high assurance boot support (HABv4) image generation to
barebox, currently tested on i.MX6 only.
In order to build a signed barebox image, add a new image target to
images/Makefile.imx as illustrated in the diff below:
- - - a/images/Makefile.imx
+ + + b/images/Makefile.imx
@@ -163,10 +163,14 @@ image-$(CONFIG_MACH_SABRELITE) += barebox-freescale-imx6dl-sabrelite.img
pblx-$(CONFIG_MACH_SABRESD) += start_imx6q_sabresd
CFG_start_imx6q_sabresd.pblx.imximg = $(board)/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg
FILE_barebox-freescale-imx6q-sabresd.img = start_imx6q_sabresd.pblx.imximg
image-$(CONFIG_MACH_SABRESD) += barebox-freescale-imx6q-sabresd.img
+CSF_start_imx6q_sabresd.pblx.imximg = $(havb4_imx6csf)
+FILE_barebox-freescale-imx6q-sabresd-signed.img = start_imx6q_sabresd.pblx.imximg.signed
+image-$(CONFIG_MACH_SABRESD) += barebox-freescale-imx6q-sabresd-signed.img
+
Here the default i.MX6 CSF file $(havb4_imx6csf) is used, it's generated during
build on from the template "scripts/habv4/habv4-imx6.csf.in". You can configure
the paths to the SRK table and certificates via: System Type -> i.MX specific
settings -> HABv4 support.
The proprietary tool "cst" by Freescale tool is expected in the PATH.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the i.MX6 based Eltec HiPerCam board.
This board comes with different i.MX6 flavours and different
memory sizes. Currently supported is the i.MX6dl version with
256MB DDR3 RAM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The BCTs are build objects and as such are located in the objtree instead of
the srctree. Fix out-of-tree build by defining a variable which refers to the
board directories in the objtree and use it for Tegra.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A lot of the image makefiles define an equal board variable, which
gives the impression that this variable is unique for this makefile.
As those files aren't freestanding makefiles but get included into a
parent makefile this is not actually true. Attempts to override this
variable will not work reliable as make is picking up a random instance.
Fix this confusion by moving this variable out of the individual makefiles.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The main idea behind this patch is to avoid redundant board code.
Because of the module similarities of all am335x based phytec boards, we can
merge its code.
The phytec-som-am335x merges the code of all am335x based phytec SOMs.
So we will have only one "board" in the barebox for phyCORE, phyFLEX.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the Altera SoCFPGA Development Kit.
The setup is based on the GHRD from Altera.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PIE is a form of dynamic linking and thus inherently incompatible
with -static. It worked ok as the current behavior of ld.bfd is
to not respect -static if -pie has been specified.
ld.gold and future versions of ld.bfd will fail to link if both
of those incompatible switches are specified at the same time.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support phyFLEX-i.MX6 SOM with 1GB on one ram bank
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the imx28evk to multiimage support and adds the
lowlevel initialization to make the bootlets unnecessary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Enable multi-image support to generate bootstream, sd-card and 2nd stage
images.
- Handle pin-mux in lowlevel.c only.
- Use fine-tuned memory setup from u-boot.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- enable multiimage support to generate bootstream, sd-card and 2nd
stage images
- Enable new defaultenv support
- Enable more features
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Freescale MXS SoCs have a multi staged boot process which needs
different images composed out of different binaries. The ROM executes
a so called bootstream which contains multiple executables. The first
one is executed in SRAM and the purpose of this binary is to setup
the internal PMIC and the SDRAM. The second image is usually the
bootloader itself. In case of barebox the bootstream is composed
out of the self extracting barebox image (pblx) and the prepare
stage for setting up the SDRAM.
The bootstream image itself is useful for USB boot, but for booting from
SD cards or NAND a BCB header has to be prepended to the image. In case
of SD boot the image has the .mxssd file extension in barebox.
Since the bootstream images are encrypted they are not suitable for
2nd stage execution. For this purpose the 2nd stage images are generated.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the Freescale i.MX6sx sabresdb board.
Tested are:
- UART
- The three SD card slots
- USB host
- USB otg (host and device mode)
- FEC (both)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for phyBOARD-SUBRA which use a phyFLEX-i.MX6 (pfla02) module.
- i.MX6 SOLO with 512MB RAM
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for phyBOARD-ALCOR which use a phyFLEX-i.MX6 (pfla02) module.
- i.MX6 Quad with 1GB RAM on two banks
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds xz decompression support from the kernel. Both compressing
the barebox binary with xz and decompressing xz files on the commandline
is supported.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Boards like phyBOARD-WEGA RDK have an phyCORE-AM335x
connected with no SPI NOR flash. Added dts to support this.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The nitrogen6x have variants with 2GB SDRAM. Add support for them. The
imxcfg files are from U-Boot.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Karo TX6X family consists of different i.MX6Q/DL based System-on-Modules.
Add support for the TX6u 801x modules, that have an i.MX6DL SoC.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>