With sandbox printf is redefined as barebox_printf so that it does
not collide with the glibc printf. This leads to tons of
include/stdio.h:12:1: warning: ‘barebox_printf’ is an unrecognized format function type
warnings. This patch fixes this.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise we end up with errno not being set correctly
if a filesystem driver uses the standard open/close/read/write
functions to access its backing store.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most cards do not answer if some reserved bits
in the ocr are set. However, some controllers
can set bit 7 (reserved for low voltages), but
how to manage low voltages SD card is not yet
specified.
based on the original U-Boot patch from
Stefano Babic <sbabic@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
if CONFIG_DEFAULT_ENVIRONMENT_PATH="" then
$(DEFAULT_ENVIRONMENT_PATH) expands to 'defaultenv "" '
The "" would cause every single file found in $(srctree) to be included in
$(ENV_FILES). This would then cause scripts/mod/sumversions.c to get
recompiled using $(CC) and fail compilation if $(CC) points to a newlib
cross compiler
Signed-off-by: Jon Ringle <jon@ringle.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sync these limits with the Linux kernel. This allows support for NAND devices
with page size of 4k.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Do the same ECC handling and ECC size in barebox than the kernel does.
Currently its done for S3C2440 based systems only, as I have no idea how to
manage it on a S3C2410 based system.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When booting from NAND, its important to know the correct page size. When
the NAND is used as the boot source, four dedicated pins are used to configure
the correct page size and address cycles. These pins can be read back in one
of the NFC registers to parametrize the load function.
This patch also extends the read routine to support more than four address
cycles on demand.
BTW: At least some mini2440s are misconfigured to use five address cycles for
a NAND device that is known to need only four address cycles. In this case the
vendor is at our side: This NAND simply ignores any additional address cycles
than required.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Something was to be done here. But I do not remember what. As it works also
without it, remove this dead code.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
After running the 'nand_boot_test' command, any usage of the NAND fails with
a IO error. This happens due to the load routine disables the NAND controller
after loading the image.
This patch re-enables the NAND controller again after running the test.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
before we can only support tftp
so keep it as default
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)
so we will match the erase block size
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With this kallsyms finally start working at least on ARM. This
enables us resolving addresses into symbols which is particularly
useful in combination with stack unwinding support. As kallsyms
now compile and work we can remove the depends on BROKEN.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Often enough the exception vectors are not on TEXT_BASE (for example
on i.MX SoCs in internal boot mode), so the board specific code did
not map the exception vectors to 0x0 but whatever happens to be on
TEXT_BASE. Also, the current section-only mapping requires the
exception vectors to be on a 1MB boundary.
Instead, create the possibility to create second level tables and
use this to map a copy of the exception vectors in a board
independent way.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only the platform sets this entry to setup the correct size or
signals the driver to guess the size of the attached disk.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
The armv7 specific __mmu_cache_on function accidently sets
the page table pointer with the unitialized value of r3. It seems
that often enough r3 still held the correct value from a previous
call to mmu_init allowing this bug to remain uncovered for longer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Marc Kleine-Budde
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD
Franck JULLIEN
Jon Ringle
Baruch Siach
Juergen Beisert
Juergen Beisert
Juergen Beisert