The FSF address has changed; The FSF site says that
address is
Free Software Foundation
51 Franklin Street, Fifth Floor
Boston, MA 02110-1301
USA
(see http://www.fsf.org/about/contact/)
Instead of updating it each time the address changes,
just drop it completely treewide.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
SAMA5D36 SoC is a sub type of SAMA5D3 which has two Ethernets
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some of the irq can still be on after a reset or power on as the IP are
powered by the backup power. This could lead to an interrupt dead lock
when the kernel boot. So disable them before booting.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can specify the devname in the board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to drop the config.h and switch to multi board support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The macb/gem core is used by the Zynq SoC. In preparation of sharing
the macb driver between at91 and Zynq, rename the platform data to
'struct macb_platform_data', and move the definition to a common
location.
Signed-off-by: Josh Cartwright <joshc@eso.teric.us>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
reset is confusing with the cpu reset and impossible to grep
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to pass more paraemeter to at91sam926x_lowlevel_init
and drop AT91_BASE_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the at91sam926x, 9g10 and 9g20 over to barebox_arm_entry.
For these SoCs we currently support reading back the memory size from
the SDRAM controller, so all of these can have a common reset() function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
it's currently working by luck
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some SoC as sam9261 or sam9263 have enough sram to directly load a barebox
from external boot.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
as we will add later the GMAC IP verion support (GEM)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This IP is present on the at91sam9 until the sam9g45, on the sam9x5 we use a
new IP.
This driver is based on the linux one.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as it's handle by detecting the IP version and bus with
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to boot from NAND/MMC and others.
This version of bootstrap is a non shell version of barebox compressed by the
pbl.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of hardcode define use a struct that the board fill
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will allow to support multiple arch
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
and then register a device
The code is take from linux
drop AT91_BASE_SYS for dbgu
factorise the soc type in the Kconfig but keep the ARCH_ so far
as the device code have the same function accross soc which for now does not
allow us to compile soc together
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
add non AT91_SYS_BASE offset base address define
This will prepare for multi arch support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can drop AT91_BASE_SYS too
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imported from the kernel
this allow to simplify the mux implemtation and will simplify the gpio support
from bare_init or pbl
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this is the first step to prepare the switch to the gpiolib
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so 0 is a valid gpio as cleanned in the kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
switch gpio type from u8 to int in the data struct
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
putc already is a regular barebox function. To avoid conflicts and
confusions just let architectures define PUTC_LL directly instead
of going through this addiotional redirection.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Antony Pavlov
Bo Shen
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD
Josh Cartwright