To make updating barebox to nand easy. To bootstrap from a SD
card:
barebox_update -t nand-xload /boot/MLO
barebox_update -t nand /boot/barebox.bin
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Breathe some life back into the beagleboard:
- switch to multiimage support
- update config
- initialize early UART for debugging
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix the DDR init sequence the same way as done by aee0013e53b339a5
from U-boot in order to prevent the boot hang under reboot stress test.
Quoting this commit log:
"Currently by running the following test:
=> setenv bootcmd reset
=> save
=> reset
, we observe a hang after approximately 20-30 minutes of stress reboot test.
Investigation of this issue revealed that when a single DDR chip select is used,
the hang does not happen. It only happens when the two chip selects are active.
MX53 reference manual states at "28.6.2 Memory ZQ calibration sequence":
"The controller must keep the memory lines quiet (except for CK) for the ZQ
calibration time as defined in the Jedec (512 cycles for ZQCL after reset, 256
for other ZQCL and 64 for ZQCS)."
According to the SDE_0 and SDE_1 bit descriptions from register ESDCTL_ESDCTL:
"Writing 1 to SDE0 or SDE1 will initiate power up delays as JEDEC defines.
Power up delays are a function of the configured memory type (DDR2/DDR3/LPDDR2)"
So make sure to activate one chip select at time (CS0 first and then CS1 later),
so that the required JEDEC delay is respected for each chip select.
With this change applied the board has gone through three days of reboot stress
test without any hang."
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit add a very basic code to allow Barebox to be booted from
IRAM. Given that the amount of IRAM on most i.MX variants is
insufficient to contain a copy of Barebox with any reasonable degree
of functionality this code uses IRAM only as a temporary location and
eventually bootstraps from DRAM. But the presense of the intermediate
IRAM-only stage allows to add provisions to test the area of DRAM that
Barebox would be using to facilitate various testing scenarious.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move all of the common clock ungating code in early UART
initialization into a dedicated subroutine that can be shared by all
of the users.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
NOTE: Boards 'karo-tx25' and 'tqma53' can benefit from this
refactoring as well, but they were not converted because of the lack
of i.MX25 or i.MX53 based hardware to test on.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for Marvell Armada XP based 4-bay NAS Lenovo
Iomega ix4-300d.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the Intel XScale PXA270 development system platform.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the i.MX6 based Eltec HiPerCam board.
This board comes with different i.MX6 flavours and different
memory sizes. Currently supported is the i.MX6dl version with
256MB DDR3 RAM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We do not pass the ip to kernel any more. So remove adding
it to bootargs when booting from nand, mmc or spi nor.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use linux.bootargs.console to specify the console since this
is the variable the console code uses for automatically assigning
a console.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This board is an early development sample that was never sold. Remove
support for it. With this the last non device tree i.MX6 board is gone.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The socdk can't be build in a multiboard environment, i.e. when other
socfgpa boards are also build.
Fix this.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This board was broken since the switch to use upstream DTs with v2014.07.
Fix it up by including the right upstream DT and delete some now
unneeded files.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The environment on the QSB is configured via devicetree, but in
the code there's also a /dev/env0 registered which is unused. Remove
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The roofs is mounted from nand when booting from spi. The VID header offset
was set fix to 2048. This is not needed any more. Removed it like it was done
for nand.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The main idea behind this patch is to avoid redundant board code.
Because of the module similarities of all am335x based phytec boards, we can
merge its code.
The phytec-som-am335x merges the code of all am335x based phytec SOMs.
So we will have only one "board" in the barebox for phyCORE, phyFLEX.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some console parameters where faulty named bootargs.base. Which does
not have any effect. Removed them where possible and renamed the others
to linux.bootargs.console.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the Altera SoCFPGA Development Kit.
The setup is based on the GHRD from Altera.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
