The i.MX6 series SoC type is determined by barebox by examining the
USB_ANALOG_DIGPROG aka IMX6_ANATOP_SI_REV register. This register is located
at a common offset for all mx6 SoC - except for i.MX6SL where a different
offset is used. This creates a dilemma while distinguishing the mx6sl from
non-mx6sl SOC since the SoC type identification register location is type
specific itself.
Access to undocumented and probably invalid or unpredictable registers should
be avoided as possible. For the mx6sl detection an access to the general
USB_ANALOG_DIGPROG @0x260 cannot be avoided when running on mx6sl. This
register contained the value 0x00014009 for different mx6sl Rev. 1.2 based
e-book readers using MCIMX6L7DVN10AB and MCIMX6L8DVN10AB SoC. This
implementation assumes the value of MAJOR_UPPER (here 0x01) to be smaller
than the smallest non-6sl MAJOR_UPPER (0x61 for mx6s).
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Preparational commit to enable the use of cpu_type macros in imx6_cpu_revision()
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Import the ARM IP bus base addresses from IMX7DRM 05/2016 AIPS Memory Map
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add driver for DSPI - SPI IP core found on various Freescale/NXP
products (including Vybrid/VF610).
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the "Enhanced Host Controller Interface Specification for
Universal Serial Bus" after a USB port reset the EHCI Driver checks the
PortEnable bit in the PORTSC register. If set to a one, the connected device is
a high-speed device [...]. At the time the EHCI Driver receives the port reset
and enable request the LineStatus bits might indicate a low-speed device.
Additionally, when the port reset process is complete, the PortEnable field may
indicate that a full-speed device is attached. In either case the EHCI driver
sets the PortOwner bit in the PORTSC register to a one to release port
ownership to a companion host controller.
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is based on a patch from the U-Boot and fixes two errors with
the LCDC. Original commit message from Jyri Sarha [1]:
"Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2,
and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With
the default values LCDC suffers from DMA FIFO underflows and frame
synchronization lost errors. The initialization values are the highest
that work flawlessly when heavy memory load is generated by CPU. 32bpp
colors were used in the test. On BBB the video mode used 110MHz pixel
clock. The mode supported by the panel of am335x-evm uses 30MHz pixel
clock."
The register values are generated by testing, because there is no formula
to calculate them. Also from Jyri Sarha [1]:
"In practice the only rule to find an optimal value is to find as high as
possible REG_PR_OLD_COUNT value that does not produce LCDC FIFO
underflows under worst case scenario. The worst case happens when the
highest pixel clock videomode with maximum bpp is used while memory
subsystem is stressed by endless stream of writes hitting the same
memory memory bank (can be the same address)."
It only contains the BeagleBone Black and the Phytec SoM, because I
don't have other boards.
[1] https://patchwork.ozlabs.org/patch/704013/
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Build of clk-imx7 depends on selection of COMMON_CLK_OF_PROVIDER
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The three MX31 PLL may be clocked from either CKIH or a frequency-multiplied
derivate of CKIL generated by the Frequency Pre Multiplier FPM.
Add the pll_ref_clk selection infrastructure and support for MCU PLL bypass
to support clock switching and boards not clocked CKIH.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
EFI applications should be unloaded to avoid leaking memory. However, boot
or runtime services continue in the background. So they must not be
unloaded.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
'[m' is supposed to have the same effect as '[0m'. However, some EFI
implementations seem to ignore '[m', so use '[0m' everywhere to avoid
rendering issues.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
0x08 is the scan-code for 'backspace' not 'delete'.
0x17 indicates the start of an escape sequence, such as "[3~" for
'delete'.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise values > 127 will become negative and are dropped.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is not yet a regulator driver, only the register map is
exported as /dev/pfuze* so the registers can be accessed for
debugging purposes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is the same that U-Boot does. The registers are not documented.
Without this the architected timer on the i.MX7 does not work.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The watchdog can either reset only the SoC or assert the WDOG_B
output signal instead. On some boards it's necessary to use the
external WDOG_B output to make sure that external devices like the
PMIC are also properly resetted. This has been fixed in the Linux
driver which honours a fsl,ext-reset-output device tree property
to select between both ways. Do the same in the barebox driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX21 watchdog type the reset operation is really different
from the watchdog enable/set timeout operation, so create an
extra callback for this instead of folding both things together.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It is quite useless without a console and breaks the build.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Testing for the write protection bit to determine if a card is write
protected or not is wrong. The bit may have the wrong value for
permanently plugged cards (eMMC) or for boards using a GPIO for
write protection detection.
Since the core will test for write protection before actually
calling into the driver this test can just be removed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
So far the eMMC boot partitions cannot be partitioned from the
device tree. Since they are often 4MiB in size they are big enough
to hold a barebox image and the environment. Add partition parsing
to the boot partitions to allow this usecase.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The binding states that a subnode containing partition subnodes
should have the name "partitions". Enforce this so that we do not
parse nodes with other names which may have partition descriptions
for other disks.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As stated in the FIXME comment this is needed. Get and
enable a "main_clk" just like the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX7 has two usbmisc devices, so we cannot use global instance
variables anymore. Create a driver private data struct for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ide_port is provided by the caller so it's not in the responsibility
of this function to free this memory in case of error.
Actually all callers do the free themselves, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the QuadPlus variant of the board as a separate
Barebox binary.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch escapes a regex that uses left brace.
Using checkpatch.pl with Perl 5.22.0 generates the warning: "Unescaped
left brace in regex is deprecated, passed through in regex;"
Comment from regcomp.c in Perl source: "Currently we don't warn when the
lbrace is at the start of a construct. This catches it in the middle of
a literal string, or when it's the first thing after something like
"\b"."
This works as a complement to 4e5d56bd ("checkpatch: fix left brace
warning").
Signed-off-by: Geyslan G. Bem <geyslan@gmail.com>
Signed-off-by: Joe Perches <joe@perches.com>
Suggested-by: Peter Senna Tschudin <peter.senna@gmail.com>
Cc: Eddie Kovsky <ewk@edkovsky.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Barebox-imd is also used in the PBL. As the object file names are different
for the PBL, the explicit dependency on generated/compile.h wasn't there.
This leads to random build failures in parallel builds, or worse the PBL
picking up the old compile.h defines from an earlier build.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This architecture is missing the right defines for the system
peripherals, that are needed for this driver to build successfully.
Disable it for now until someone with a clue about this architecture
can fill in the gap.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Alexander Kurz
Andrey Smirnov
Peter Mamonov
Daniel Schultz
Michael Olbrich
Andrey Gusakov
Sascha Hauer
Juergen Borleis
Lucas Stach
Uwe Kleine-König
Geyslan G. Bem