FUSEs (OTP registers) can be written via /dev/imx-ocotp character device.
For example, writing MAC 12:34:56:78:9A:BC can be performed as
> mw -l -d /dev/imx-ocotp 0x8c 0x00001234
> mw -l -d /dev/imx-ocotp 0x88 0x56789ABC
and reading as
> md -l -s /dev/imx-ocotp 0x88+8
00000088: 56789ABC 00001234
, where 0x88 (0x22*4) and 0x8C (0x23*4) are offsets of MAC OTP registers.
Notice: FUSEs are PROM, so "0" (unprogrammed) bits
can be replaced with "1" (but not vice versa) only once.
Also, for MAC there are convinient parameters:
> ocotp0.permanent_write_enable=1
> ocotp0.mac_addr=12:34:56:78:9A:BC
imx_ocotp 21bc000.ocotp: reloading shadow registers...
imx_ocotp 21bc000.ocotp: reloading shadow registers...
> echo $ocotp0.mac_addr
12:34:56:78:9A:BC
Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move the imx6-reg.h include to the imx6-mmdc header.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for Phytec phyCARD-i.MX6.
- 1GB RAM on two banks
- 1GB RAM on one bank
- 2GB RAM on two banks
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this board is produced by Embest/Element 14 and is based on i.MX6 Solo
The following features are tested :
- UART2 (console)
- eMMC
- SDCard
- uSDCard
- Ethernet
- USB Host (through 4 ports hub)
- I2C 1/2/3
- 2 LEDs
Boot on eMMC and through USB loader are tested.
For more informations on this board : http://www.riotboard.org/
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pingrp defines never made it upstream, so roll back the changes
and use the individual pin defines for the Efika sb instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox used to have its own include/dt-bindings with files copied
from the corresponding kernel files. Use upstream dt-bindings directly
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To reduce the devicetree files for one board with different memory sizes the
memory size can be read back from i.MX6.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When a mtd device can have bad blocks we want to create a
bb device, so do this automatically. This allows us to
drop bb device creation from the environment.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The purpose of envfs_register_partition is to print an error
message when the partition does not exist. Print an error message
from generic code instead and drop this function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Not needed anymore, as barebox sets this up itself now.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This most likely doesn't fix any real bugs, but it's the
right thing to do and reduces the noise level with static
checkers.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise SAM A5d35 would be detected as A5d36.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current implementation fakes a memory-mapped I/O device
at 0x3f8 and 0x2f8, then uses platform read/write functions
to do the actual reading and writing. These platform functions
only exist for the x86 platform; better to move the I/O
routines into the driver and have the driver request I/O ports
using request_ioport_region.
Signed-off-by: Michel Stam <michel@reverze.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise reading or writing to the SPI flash doesn't
work.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rework the current framework so that I/O mapped I/O resources are
also possible.
Signed-off-by: Michel Stam <michel@reverze.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For a version 1.0 board the rest of loco_late_init should be executed
to completely configure the board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The board code does a phy reset. This implicitly requests the phy reset
gpio. This gpio is also registered in the devicetree as phy reset gpio,
so the fec driver probe can't request the gpio and bails out with -EBUSY.
Fix this by freeing the phy reset gpio in the board code. While at it use
gpio_request_array for the gpios.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds CBUS UART dts support;
also it adds the necessary macros for DEBUG_LL.
qemu-malta supports three serial interfaces:
* two ports are provided by the FDC37M817
Super I/O; this chip is connected via LPC bus
to Intel 82371EB (PIIX4E) South Bridge;
* the third serial port is provided by
the discrete TI 16C550C (CBUS UART);
this chip is connected via CBUS directly
to the board's GT64120 North Bridge.
See Malta User's Manual (MD00048) for details.
CBUS UART Instructions for use:
1. Enable CONFIG_CONSOLE_ACTIVATE_ALL in .config
(or disable uart0 in dts) and compile barebox;
2. run qemu:
qemu-system-mips -nographic -nodefaults \
-monitor null -M malta -m 256 \
-serial null -serial null -serial stdio \
-bios barebox-flash-image
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add an environment partition and support commands so that the system
configuration can be permanent.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
SAMA5D36 SoC is a sub type of SAMA5D3 which has two Ethernets
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Uladzimir Bely
Christian Hemp
Lucas Stach
Eric Bénard
Lucas Stach
Michel Stam
Wjatscheslaw Stoljarski
Antony Pavlov
Renaud Barbier
Bo Shen