Commit Graph

19 Commits

Author SHA1 Message Date
Holger Hans Peter Freyther 910bd284c3 i2c: Enable i2c and perform bus clear procedure
Help the boot loader and perform a bus clear. U-Boot will try to
read the MAC from the EEPROM and barebox has the complex boot
state stored in it.

In the past we have seen U-boot failing to read from the EEPROM
and let's have one place to initialize it.
2016-06-28 08:45:29 +02:00
Holger Hans Peter Freyther 77aac3693b nand: Speculative change for later board revisions 2016-06-06 14:14:37 +02:00
Holger Hans Peter Freyther 0974846c2d sysmobts: Be able to toggle the nWP on the flash through a GPIO
Starting from revision F we can toggle a GPIO to control nWP of
the NAND chip. This means that during power-on or other mode of
operation no changes can be done to the flash.

Remove the nWP before we try to write to the flash in the UART
mode. Leave it enabled for further operations.
2015-02-05 19:03:14 +01:00
Holger Hans Peter Freyther 92b4a3a288 uartboot: Count how many copies were written
We want to know how many copies of UBL/APP have been written.
It is necessary to know that we have written multiple copies
to avoid two bitflips rendering the device unusable.

dvnixload debug1:    Reading: [INFO: UBLs written: 0x5]
dvnixload debug1:    Reading: [INFO: APPs written: 0x4]

Related: SYS#438
2014-11-20 18:47:34 +01:00
Holger Hans Peter Freyther de83b50dec misc: Build with no strict aliasing to avoid compiler warnings
I have not looked at the change in binary size but it seems to
be fine and still works on the device.

nandboot.c:61:3: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
   magicNum = *((uint32_t *) nand_header);
nand.c:800:5: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
     uart_send_hexnum(*((uint32_t *) &read_buf[k]), 8);
2014-11-20 18:38:32 +01:00
Holger Hans Peter Freyther 43383917fd uart/timeout: Reduce the I_ME timeout to a lower value again
Do not block the boot process for five seconds or longer. When
adding the configurable timeout the other timeout code got broken.
Remove it and instead supply uart_recv_bytes with the timeout per
2014-07-11 10:12:50 +02:00
Holger Hans Peter Freyther e057397dad nand: Increase the nand timeout for the toshiba flash 2014-07-10 09:24:48 +02:00
Holger Hans Peter Freyther d902a1c044 timer: Make the timer configurable and use it
Instead of counting a variable sleep for a given/predictable time.
Update the uart code with this value.
2014-07-09 19:38:07 +02:00
Holger Hans Peter Freyther d1c87ee29d nand: Set the A1CR depending on the flash chip used
This means that the U-Boot now needs to stop to set these
values. I have manually tested this with BTS #1 and micron
flash. "MICRON" was printed on the serial console.
2014-07-08 18:56:24 +02:00
Holger Hans Peter Freyther e564034a60 nand: Write multiple copies of UBL and U-Boot
The NAND might have more bit flips than can be recovered. The way
to deal with it is to write multiple copies on multiple pages. The
probability of all pages failing depends on the specific NAND flash
used and was not calculated so far. The RBL is capable of trying to
load several copies and we should be more safe now.

This requires a new partioning inside the U-Boot or other bootloader.
2014-05-19 19:17:51 +02:00
Holger Hans Peter Freyther 1cfc889457 nand: Detect and correct bit errors on the sysmoBTSv2D and later platforms
I disabled the initialization of the vector interrupt tables in
davinci.c and then I can use u-boot commands like these

load and start ubl
dhcp; set serverip; tftp ubl_sysmobts_v2.elf; bootelf

manipulate bits. Flip a 1 to a 0:

nand read.raw 0x85000000 0x00080000 1
mm.b 0x85000000
nand write.raw 0x85000000 0x00080000 1
2014-05-19 19:14:12 +02:00
Holger Hans Peter Freyther 7eb4f90930 git: Ignore the generated files 2012-07-11 09:07:21 +02:00
Holger Hans Peter Freyther d04f24974a interrupt: Allow to interrupt the NAND boot by sending a command
Before doing the NAND boot the 'I_ME' message will be sent and the
ubl will wait up to a second for a response. This interruption mode
can be disabled, e.g. when deploying the system in a publically
accessible system. Right now the possibility of easy recovery is
more important.
2012-07-11 09:05:23 +02:00
Holger Hans Peter Freyther 77e016b643 gzip: The GZIP feature has been removed, remove the last traces of it 2012-07-11 07:40:08 +02:00
Holger Hans Peter Freyther a36a9de3ef sysmobts_v2: Set PINMUX0_DEFAULT and PINMUX1_DEFAULT for sysmoBTS v2
Initialize the PINMUX for the v2 hardware. This is fixing the
initial cpu_info printf of U-Boot. Select UART0, UART1.
2012-07-10 23:15:01 +02:00
Holger Hans Peter Freyther 8bb73db43a sysmobts_v2: Add sysmobts_v2 with runtime detection of DDR/NAND
Add the sysmobts_v2 board, move the DDR type detection into the ubl
with a fallback for the sysmobts_v1 with the current type of ram.
2012-04-25 09:20:55 +02:00
Holger Hans Peter Freyther 091a793e08 gzip: Remove the gunzip option from ubl to save some space in the binary 2012-04-25 09:20:55 +02:00
Holger Hans Peter Freyther d92d124eea sysmobts_v1: Add sysmobts_v1 changes to the UBL code. 2012-04-25 09:20:55 +02:00
Holger Hans Peter Freyther 4b779cf0d2 dvnixload/ubl copy as of pre 0.2.6 svn 2012-04-25 09:20:50 +02:00