Changing the arch/arm/dts/am335x-phytec-phycore.dts would be
another option but that would break loading a mainline kernel.
The idea/patch is coming from Jan.
Also drop redundant xzalloc() result check
as xzalloc() does not return in case of memory allocation error.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some mtd device does not support lock and unlock functions. Adding this check
avoids crashing when mtd_part_lock/unlock are called for such devices.
Signed-off-by: Zahari Doychev <zahari.doychev@linux.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver is based on Linux 2.6.39 8139too driver.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Delete the partition erase size initialisation to let the code
that follows determine the biggest partition erase size.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ENC28J60 is a stand-alone Ethernet controller with SPI Interface
and integrated 10BASE-T PHY.
This driver was ported from linux-3.15.
The most notable barebox driver version changes:
* add device tree support;
* drop netif_msg_*() debug level checking;
* use IF_ENABLED for checking CONFIG_ENC28J60_WRITEVERIFY;
* add mii_bus support.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds pinctrl drivers for Marvell Dove and Kirkwood SoCs based
on a common driver stub. This design is based on the corresponding
Linux driver and should ease additional drivers for Marvell Armada
SoCs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
DT PCI address translation needs a special handling. This imports
the corresponding translator into of/address.c but makes it selectable
through Kconfig. Compared to the Linux version, we don't check for
struct device_node's type which does not exist on Barebox but directly
for device_type property set to "pci".
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds initial support for Marvell PHY specific drivers. As a first
PHY, a driver for MV88E1121R is ported over from Linux.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
RGMII PHY modes include delayed interface modes RGMII_ID, RGMII_TXID,
and RGMII_RXID. Also check for those modes when setup RGMII mode in
port serial ctrl register.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Marvell Orion ethernet IP originally is multi-port capable, but SoCs
using the IP usually have multiple single-port controllers built in.
Currently, orion-gbe driver registers each port device with a constant
name, which causes a name conflict with multiple controller instances.
This patch uniquifies port device name generation by prepending
controller's base register address to resolve the name conflict.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ePAPR defines phy-connection-type as standard property for PHY interface
between Ethernet device and PHY device. Add corresponding property check
to of_get_phy_mode.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver provides common support for accessing
the CBUS FPGA I2C lines through the gpio library.
Additional i2c bitbang driver must be enabled
in order to use the functionality of the i2c controller.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Timers found on Marvell Armada 370 and XP require different setup.
While timer clock on Armada 370 can be derived from a divided
reference clocks, Armada XP always uses a 25MHz reference.
This also updates compatibles to destinguish timers for both SoCs
and fixes some whitespace issues on defines.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The FSF address has changed; The FSF site says that
address is
Free Software Foundation
51 Franklin Street, Fifth Floor
Boston, MA 02110-1301
USA
(see http://www.fsf.org/about/contact/)
Instead of updating it each time the address changes,
just drop it completely treewide.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current code counts the eraseregions a new partition spans and
sets the partitions number of eraseregions accordingly, but the code
forgets to allocate and fill in the eraseregions for the partition
mtd device. This makes the erase operation crash with a NULL pointer
exception.
This patch fixes this with the same approach the kernel uses: Set
the number of eraseregions to 1 unconditionally and the eraseregion
size to the maximum of the eraseregions found in the partition.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Set mtd erasize using max erasesize from erase regions
Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The controller is similar enough to the ones found
on earlier generation SoCs to not need any additional
changes.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the real value is 2^p a input value of 0 is
actually valid.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tegra124 extended the mux by 1bit to allow for
more PLL sources.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We can reuse the Tegra30 pinctrl driver, as the bit
layout is the same. Just add the pin and drivegroups
and some compile-time magic to avoid bloat.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Access pin and drivegroups through a drvdata pointer.
This allows to insert other groups for SoCs with a
similar bit layout easily.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no need to check the card-detect status
for non-removable devices.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Bit 7 of UCR3 is described in the i.MX reference manuals (with the exception
of i.MX1) as follows:
ADNIMP: Autobaud Detection Not Improved-. Disables new features of
autobaud detection (See Baud Rate Automatic Detection
Protocol, for more details).
0 Autobaud detection new features selected
1 Keep old autobaud detection mechanism
The "new features" mechanism occasionally causes the receiver to get out of sync
and continuously produces received characters of '0xff'.
In order to reproduce the problem:
$ cs0.baudrate=19200
- Change the terminal baudrate to 19200
- Type in the console and it should look good
- Change the terminal baudrate back to 115200
- Type 'b' in the console, then a stream of '0xff' is transmitted in loop
Setting the ADNIMP bit avoids the transmission of '0xff' in loop.
Also rename the bit definition as per the reference manual.
Tested on mx6q.
Based on a patch from Eric Nelson for U-boot.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* some output sections started with "foo: bar", some with "foo = bar". Unify this.
* there was a fixed size to the "foo =" parameters, which wasn't fitting, this
was especially visible at "devinfo global"
* don't output "resources:", "driver:" and "bus:" lines if there are none
resources, drivers or busses involved.
* remove some empty lines
* harmonize differentiation between headlines (e.g. "resources:") and values
by indenting values slightly
* uppercase some texts
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Holger Hans Peter Freyther
Antony Pavlov
Zahari Doychev
Sascha Hauer
Renaud Barbier
Sebastian Hesselbarth
Herve Codina
Lucas Stach
Fabio Estevam
Holger Schurig