This adds support for the clocktree on zynq7000 SoCs.
The patch is based on clocks.c from the larger patch
ARM: zynq: add suppport for Zynq 7000 SoC
by Josh Cartwright.
The driver in that patch is converted to a platform_driver and code to
enable plls was added.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add basic support for the Xilinx Zynq-7000 EPP architecture.
The Zynq-7000 is an embedded processing platform that combines a Cortex A9
dualcore MPSoC with an Artix-7 FPGA.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On some i.MX SoCs the SDRAM controller has chipselect 2 enabled
by reset default. This confuses our SDRAM size detection. We
already have a fix for this in place. This patch adds the fix
for i.MX35 which needs it aswell. Also since we now detect the
SDRAM size in the SoC specific entry functions we have to apply
the fixup there, too.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When the board is booted from NAND we have to setup the iomux to
make the SD card work. Unfortunately this still is not enough :(
The SD card still will only work when booting from it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Support for ext filesystems has been introduced recently. We can now
boot directly from our rootfs, loading the kernel and device tree
images from /boot.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
depending on the power domain register we need to disable sata or mmc
and update the cpu informations
take from Calxeda U-Boot git
Register the original dtb to /dev/firmware-dtb and the fixed dtb to /dev/dtb
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so the board can use it
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since we added a new partition in the board, the partitions number of
the boot and rootfs partition have changed as well.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since the only storage medium on the cfa-10036 is the MMC card, we need
to have a registered environment partition on it if we want to be able
to modify at runtime.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- switch to new environment
- make barebox partitions 512K big
- update defconfig for new env:
- enable menu support
- miitool support
- clk commands
- oftree support
- let/dirname/readlink commands
- enable external nand boot support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is to complete the work of two recent commits:
- defenv2: move config-board out of /env/init
- defenv2: comment setting default values in /env/config
Signed-off-by: Fabio Porcedda <fabio.porcedda@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The reset value for the MAX clk gate is 0b10, that is it is turned
on in CPU run mode and off in stop mode. Configure it that way during
startup.
The 0b11 value previously in this field causes some nasty behaviour in
the Linux kernel:
- The i.MX35 has two bits per clock gate which are decoded as follows:
0b00 -> clock off
0b01 -> clock is on in run mode, off in wait/doze
0b10 -> clock is on in run/wait mode, off in doze
0b11 -> clock is always on
The MAX clock is needed by the SoC, yet unused in the Kernel, so the
common clock framework will disable it during late init time. It will
only disable clocks though which it detects as being on. This detection
is made depending on the lower bit of the gate. So with the value of
0b11 the clock framework will detect the clock as turned on, yet unused,
hence it will turn it off and the system locks up.
With the value of 0b10 instead, the clock framework will detect the
clock as being disabled and will not try to turn it off, so the
system works.
The real bug is in the Linux clock framework. However, the value 0f 0b10
seems to be a sane default value, so restore it. This lets Linux work
again and gives time to fix the bug in Linux.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We cannot jump to SDRAM unconditionally in imx*_barebox_boot_nand_external.
When we really boot from NOR flash the binary is not yet copied to SDRAM.
Instead, let the return value of imx_barebox_boot_nand_external() indicate
whether we really boot from NAND and only jump to SDRAM in this case.
Otherwise just continue to the normal SoC specific entry.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only one of IIM, CCM or ESDCTL device is allowed, so use DEVICE_ID_SINGLE
for these devices.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PCM038 uses IIM in board code, so select IMX_IIM symbol by default.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
needed by the real hardware
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Refactor to remove duplicated code without changing functionality.
Put "then" on the same line of "if", because:
- is the most used style in barebox
- is like c code style
- is more compact
Reduce the number of lines from 50 to 40.
Tested on at91sam9260ek.
Signed-off-by: Fabio Porcedda <fabio.porcedda@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides rename MFD-related symbols for using MFD-prefix.
Additionally, sorting mfd/Kconfig and mfd/Makefile records.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the value of
its first argument, as is usually expected from standard implementations.
For instance in the following function:
void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
{
memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
waiter->magic = waiter;
INIT_LIST_HEAD(&waiter->list);
}
compiled as:
800554d0 <debug_mutex_lock_common>:
800554d0: e92d4008 push {r3, lr}
800554d4: e1a00001 mov r0, r1
800554d8: e3a02010 mov r2, #16 ; 0x10
800554dc: e3a01011 mov r1, #17 ; 0x11
800554e0: eb04426e bl 80165ea0 <memset>
800554e4: e1a03000 mov r3, r0
800554e8: e583000c str r0, [r3, #12]
800554ec: e5830000 str r0, [r3]
800554f0: e5830004 str r0, [r3, #4]
800554f4: e8bd8008 pop {r3, pc}
GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
register/memory corruptions.
This patch fixes the return value of the assembly version of memset.
Could you please review, or suggest better alternatives ?
Thanks,
--
Ivan
(this is a shorter and (hopefully) clearer repost of
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-January/144916.html)
The patch adds a 'mov' instruction and merges an additional load+store into
existing load/store instructions.
For ease of review, here is a breakdown of the patch into 4 simple steps:
Step 1
======
Perform the following substitutions:
ip -> r8, then
r0 -> ip,
and insert 'mov ip, r0' as the first statement of the function.
At this point, we have a memset() implementation returning the proper result,
but corrupting r8 on some paths (the ones that were using ip).
Step 2
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:
save r8:
- str lr, [sp, #-4]!
+ stmfd sp!, {r8, lr}
and restore r8 on both exit paths:
- ldmeqfd sp!, {pc} @ Now <64 bytes to go.
+ ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
(...)
tst r2, #16
stmneia ip!, {r1, r3, r8, lr}
- ldr lr, [sp], #4
+ ldmfd sp!, {r8, lr}
Step 3
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 0:
save r8:
- stmfd sp!, {r4-r7, lr}
+ stmfd sp!, {r4-r8, lr}
and restore r8 on both exit paths:
bgt 3b
- ldmeqfd sp!, {r4-r7, pc}
+ ldmeqfd sp!, {r4-r8, pc}
(...)
tst r2, #16
stmneia ip!, {r4-r7}
- ldmfd sp!, {r4-r7, lr}
+ ldmfd sp!, {r4-r8, lr}
Step 4
======
Rewrite register list "r4-r7, r8" as "r4-r8".
Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
arch/arm/boards/phycard-a-l1/lowlevel.c: In function 'pcaal1_sdrc_init':
arch/arm/boards/phycard-a-l1/lowlevel.c:105:2: warning: implicit declaration of function 'get_ram_size' [-Wimplicit-function-declaration]
arch/arm/boards/phycard-a-l1/lowlevel.c:113:3: warning: implicit declaration of function 'hang' [-Wimplicit-function-declaration]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using IS_ENABLED instead of #if/#ifdef the compiler can check
all the code.
Using IS_ENABLED for configuring smc->mode is an optimization,
reduce init.o text from 905 to 877.
Signed-off-by: Fabio Porcedda <fabio.porcedda@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX21 has a imx1 gpio type. Change the name accordingly, otherwise
the gpio driver does not probe successfully.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX35 has a imx31 gpio type. Change the name accordingly, otherwise
the gpio driver does not probe successfully.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Steffen Trumtrar
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD
Maxime Ripard
Alexander Shiyan
Fabio Porcedda
Eric Bénard
Ivan Djelic