Use VERSION register instead of CPU type to determine IP block's version
and capabilities. This what corresponding Linux kernel driver does.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On AT91 GPIOs default to being inputs, so we need to explicitly
configure CS gpio to being an output.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add driver for DSPI - SPI IP core found on various Freescale/NXP
products (including Vybrid/VF610).
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This looks nicer and reduces the time to transfer 40 MB at 50 MHz from
203 seconds to 87 seconds.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This optimization reduced the time to transfer 40 MB at 50 MHz from
214 seconds to 203 seconds.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Initialize pdiv in declaration
- fix format specifiers
- simplify range check, pdiv can never be > 7
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The function used a separate variable to hold the value calculated and
only used it for range checking but then didn't use it.
This fixes calculation for slow baud rate that require a divider > 15.
Additionally fix the rounding.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When a message transfer fails no further messages are transferred, but
the error value was not propagated to the caller.
Fixes: 5db1a578d6 ("spi: add Marvell MVEBU SoC SPI driver")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In rare cases the controller is does not work right after probe. When
this happens the registers show that the TXFIFO contains words, but
the transfer is never started. We observed that on some boards which
boot from SPI NOR. The xload SPI code leaves the controller enabled,
so the SPI controller is enabled during probe(). Disabling it before
usage (and thus resetting it) helps. We haven't found out why exactly
this happens.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are two problems that made the driver choose the wrong baudrate
calculation algorithm:
a) The compatible used on 370/XP isn't marvell,armada-370-xp-spi but
marvell,armada-370-spi or marvell,armada-xp-spi respectively.
b) The probe function uses
match = of_match_node(mvebu_spi_dt_ids, dev->device_node);
to determine the right algorithm. As the devices are also compatible
to marvell,orion-spi and this comes first in mvebu_spi_dt_ids[]
it's always the older Orion algorithm that is used.
This patch fixes both problems.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mvebu socs support up to 8 chip selects. Make use of them.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX50 SOC includes one ESDHCv3, three ESDHCv2, one cspi and
two ecspi instances which are supported by existing drivers.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX31 SPI interface was refered by freescale as spi_ver_0_4 in one
of their older vendor extended linux releases. spi_ver_0_4 differs only
in minor aspects to spi_ver_0_7 (i.MX35) which is already supported by
barebox.
Regarding barebox, the differences boil down to the location and length
of the CHIP SELECT and BIT COUNT/BURST LENGTH elements of CONREG. The
spi_ver_0_4 variant is limited to single word bursts with a maximum of
32 bits_per_word.
Add support for the i.MX31 SPI interface to the barebox spi_ver_0_7
implementation.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The "fsl,spi-num-chipselects" property will be marked obsolete soon.
This patch updates the driver to be ready to such changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Our asprintf and vasprintf have different prototypes than the glibc
functions. This causes trouble when we want to share barebox code
with userspace code. Change the prototypes for (v)asprintf to match
the glibc prototypes. Since the current (v)asprintf are convenient
to use change the existing functions to b(v)asprintf.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of writing one word to the txfifo and then wait until
one is received in the rxfifo we can write while the txfifos
are not full and read as long the rxfifos contain data. This
makes transfers for the m25p80 driver around 7 times faster
here.
Unlike the last version this time we only optimize the common
case with 8 bits per word and SPI_LSB_FIRST cleared. The other
cases would require more bit shuffling of the data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of writing one word to the txfifo and then wait until
one is received in the rxfifo we can write until the txfifos
are not full and read as long the rxfifos contain data. This
makes transfers for the m25p80 driver around 7 times faster
here.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are SoC specific ways to optimize transfers. Make the way free
to implement these by creating SoC specific transfer functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX SPI controller in version 2.3 can immediately start a transfer
when the txfifo is written to. In this mode we no longer have to trigger
the transfer with the xch bit which makes the code a bit simpler.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The register defines will be used by the SPI xload code, so move
them to a place where the xload code can include them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 2e6a88f210 (add cpu native ordered io accessors) introduced
these macros and then commit be57f20cdd (Fix big endian MMIO
primitives) figured out they are equivalent to __raw_{read,write}*.
They turned out unnecessary after all. Anyway, most source files
use __raw_read* and __raw_write*.
Let's replace a few remaining references and abolish them.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since 2011 barebox' of_device_id struct uses unsigned long type for data field:
struct of_device_id {
char *compatible;
unsigned long data;
};
Almost always struct of_device_id.data field are used as pointer
and need 'unsigned long' casting.
E.g. see 'git grep -A 4 of_device_id drivers/' output:
drivers/ata/sata-imx.c:static __maybe_unused struct of_device_id imx_sata_dt_ids[] = {
drivers/ata/sata-imx.c- {
drivers/ata/sata-imx.c- .compatible = "fsl,imx6q-ahci",
drivers/ata/sata-imx.c- .data = (unsigned long)&data_imx6,
drivers/ata/sata-imx.c- }, {
Here is of_device_id struct in linux kernel v4.0:
struct of_device_id {
char name[32];
char type[32];
char compatible[128];
const void *data;
};
Changing of_device_id.data type to 'const void *data' will increase
barebox' linux kernel compatibility and decrease number of 'unsigned
long' casts.
Part of the patch was done using the 'coccinelle' tool with the
following semantic patch:
@rule1@
identifier dev;
identifier type;
identifier func;
@@
func(...) {
<...
- dev_get_drvdata(dev, (unsigned long *)&type)
+ dev_get_drvdata(dev, (const void **)&type)
...>
}
@rule2@
identifier dev;
identifier type;
identifier func;
identifier data;
@@
func(...) {
<...
- dev_get_drvdata(dev, (unsigned long *)&type->data)
+ dev_get_drvdata(dev, (const void **)&type->data)
...>
}
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a driver for SPI master by GPIO pins.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Bitbang helpers for SPI require spidelay. This should be set
by the user and not the helper itself. Move it to ath79_spi
instead.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the code to correctly handle 'cs_change' field in 'struct
spi_transfer'(base on the similar code from altera_spi.c)
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The bus implementations currently call the drivers remove
hook unconditionally, but this hook is seldomly populated. Only call
it when it's actually populated.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This better separates the DMA from the MMU functionality.
Also move all drivers that only depends on asm/mmu.h for the alloc
functions over to the common header.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add code to support SPI transfers that have data shifted out least
significant bit first. This is useful in many cases, but specifically
it is needed for drivers/firmware/altera_serial.c to work on i.MX
platform.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed; The FSF site says that
address is
Free Software Foundation
51 Franklin Street, Fifth Floor
Boston, MA 02110-1301
USA
(see http://www.fsf.org/about/contact/)
Instead of updating it each time the address changes,
just drop it completely treewide.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OMAP SPI core allows swapping MISO/MOSI and some boards are
wired up that way, so add a property to swap the lines.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Andrey Smirnov
Sascha Hauer
Uwe Kleine-König
Alexander Kurz
Alexander Shiyan
Antony Pavlov
Du Huanpeng
Jan Luebbe
Masahiro Yamada
Sebastian Hesselbarth
Lucas Stach
Jan Luebbe