Use a mlo device tree with all bootable devices disabled.
The bootsource is checked in the board file and only the
needed device is enabled and registered.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for registering disabled boot devices from oftree.
Creating a device tree with all bootable devices disabled, makes
it possible to only enable and register the devices needed to
load the next stage bootloader.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The KSZ9031 gigabit phy on the PBA-B-01 carrier board needs special settings
for the RGMII skew control register.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
"Silicon revision 1.0 devices only provide the MMC2_DAT7 signal when Mode3 is
selected. Silicon revision 2.0 and newer devices implement another level of
pin multiplexing which provides the original MMC2_DAT7 signal or RMII2_CRS_DV
signal when Mode3 is selected. This new level of of pin multiplexing is
selected with bit zero of the SMA2 register."
See AM335x Sitara Processors Manual.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update nand bootargs for phyFLEX-AM335x and phyCORE-AM335x
to support modern kernels.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
last_block is a zero-based block number, so the total number of blocks is
last_block + 1
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Boards like phyBOARD-WEGA RDK have an phyCORE-AM335x
connected with no SPI NOR flash. Added dts to support this.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To support different module variants, split the phyCORE dts
in dts and dtsi. Configurable parts which are supported by
barebox are spi nor flash and i2c eeprom.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The phyCORE-AM335x is a SOM that can be connected to different
carrierboards like PCM-953, phyBOARD-WEGA and phyBOARD-MAIA.
It is enough for the bootloader to support the SOM specific
parts and can be so used also on different carrierboards.
Removed carrierboard specific settings like led and the
second ethernet slave.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Set default bootsource to the $boosource variable
- Pass ip to kernel on all boot options
- mount rootfs rw
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a mvebu_defconfig which enables all mvebu based boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Before actually doing something the user should always confirm the
update. Move the question out of the if() block.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Additionally to the MLO update handlers also register the update
handlers for the regular barebox image.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To be able to not only update the MLO in NAND but also the
regular barebox image.
Since this is implemented with help of the corresponding xload
handler this also removes the 'xload' from the Kconfig options
and the filename.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These are necessary for USB support. To make sure they are actually
enabled when a USB capable barebox is started call the clock enable
function during startup also for the full barebox, not only the MLO.
Signed-off-by: Rolf Evers-Fischer <rolf.evers.fischer@delphi.com>
The AM3xxx can boot images containing a Configuration Header
(generated with omap_signGP) or images with GP Header (simple
size/address information in front of raw image). Update the
SPI NOR barebox update handler to detect the GP Header images.
These have 0x65726162 ('bare') at the offset header[10]. Also
automatically swap the endianess for non swapped images so
that the regular non swapped images can also be flashed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We assumed that there is a special image format for SPI. This is not
the case. The AM33xx can boot either images generated with omap_signGP
or raw images which only have the image size and load address in front
of the image. Whether these images are booted from SPI or another
boot medium doesn't matter. The only special thing about SPI is that
the image is in big endian format.
- renames mk-am3xxx-spi-image.c to mk-omap-image.c as the image format
is not only supported by AM3xxx but also by the OMAP SoCs
- removes the option to specify the SoC
- introduces -s to build a big endian image
- detects if an image already is an image generated with omap_signGP
So the behaviour is like this:
raw image -> mk-omap-image -> prepend size/address -> image for SD/MMC
raw image -> mk-omap-image -s -> prepend size/address, big endian swap -> image for SPI
CH image -> mk-omap-image -> nothing, input == output
CH image -> mk-omap-image -s -> big endian swap -> image for SPI
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add Atmel sama5d4ek board support, which include following features:
- NAND flash support
- SPI flash support
- MMC card support (MCI1)
- LCD display support (with QT1070)
- Ethernet support
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Now that the correct SoC specific memory fixup function is called
we can allow to select multiple SoCs in Kconfig.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Sascha Hauer
Teresa Gámez
Wadim Egorov
Uwe Kleine-König
Michael Olbrich
Lucas Stach
Juergen Borleis
Stefan Müller-Klieser
Rolf Evers-Fischer
Eric Bénard
Bo Shen