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Author SHA1 Message Date
Sascha Hauer 295f0b23b5 ARM: mvebu: Simplify memory init order
The initialisation of the memory nodes on mvebu is a bit
compilcated:

pure_initcall(mvebu_memory_fixup_register)
	of_register_fixup(mvebu_memory_of_fixup, NULL)
core_initcall(kirkwood_init_soc)
	mvebu_set_memory()
core_initcall(of_arm_init)
	of_fix_tree()
		mvebu_memory_of_fixup()

First a mvebu common of_fixup function is registered, then the SoC
calls mvebu_set_memory which stores the memory base and size in global
variables. Afterwards the of_fixup is executed which fixes the memory
nodes according to the global variables.

Instead register a SoC specific fixup which directly calls mvebu_set_memory
with the memory base and size as arguments:

pure_initcall(kirkwood_register_soc_fixup);
	of_register_fixup(kirkwood_init_soc, NULL);
core_initcall(of_arm_init)
	of_fix_tree()
		kirkwood_init_soc()
			mvebu_set_memory(phys_base, phys_size);

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-09-19 09:47:36 +02:00
Sebastian Hesselbarth 561dfebb4b ARM: mvebu: Add machine compatible to mbus ranges
Multi-SoC support for MVEBU will add mbus ranges for all compiled
SoCs. To protect the mbus node of the SoC barebox is executed on
from others ranges, pass machine's compatible to mvebu_mbus_add_range
and check before applying the fixup.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-09-19 09:47:35 +02:00
Sascha Hauer f94a71cb51 ARM: mvebu: Add common reset_cpu function
mvebu has a reset_cpu function per SoC this does not work when multiple
SoCs are selected, so add a common reset_cpu function which calls into
the SoC specific ones.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-09-19 09:47:35 +02:00
Sebastian Hesselbarth 0992c07b49 ARM: mvebu: add fixup for directly attached memory
On Marvell MVEBU SoCs memory size is set up by BootROM and can be read
from SoC's RAM controller. With early DT fixups available, set corresponding
DT node to reflect accessible amount of directly attached RAM.

This patch also removes non-DT call to arm_add_mem_device to silence a
warning about request_region conflict due to adding a mem device twice.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-07-25 08:59:01 +02:00
Sebastian Hesselbarth a9acc238e6 ARM: mvebu: add register remap for mbus ids
For each supported MVEBU SoC, add the corresponding remapped registers
to fix them up in provided DTBs.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-07-25 08:59:01 +02:00
Sebastian Hesselbarth 90256ab908 ARM: mvebu: set model and default hostname for Dove
Set default model and hostname based on SoC name.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-06-24 08:25:03 +02:00
Sebastian Hesselbarth f9181bab14 ARM: dove: remove temporary clock and non-DT device probing
With OF clock providers, we can now remove temporary clocks and clock
aliases. Also, non-DT device probing for timer and serial is removed.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-08-16 08:45:36 +02:00
Sebastian Hesselbarth 4ac64ec43f ARM: mvebu: add clock aliases for spi0/spi1 on Dove
This adds clock aliases for spi controllers found on Dove to allow
spi driver to get tclk frequency.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-07-09 08:56:07 +02:00
Sebastian Hesselbarth 6e40610d51 clocksource: orion: lookup clock by physbase
This converts Kirkwood and Dove SoC init to register tclk alias
for timer by physbase instead of name.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-07-05 08:27:10 +02:00
Sebastian Hesselbarth edf543d93e ARM: mvebu: move soc_init to core_initcall
Clocks need to be accessed early for DT support, so move soc_init to
core_initcall instead of postcore_initcall.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-07-05 08:27:10 +02:00
Sebastian Hesselbarth 7286acab67 arm: mvebu: introduce common lowlevel and early init
At early stage after boot, all MVEBU SoCs are similar enough to have
a common lowlevel and barebox entry. We  also remap the internal register
base address to 0xf100000 as it gives some 512M more of contiguous address
space. As we cannot determine real memory size that early, we start with
a default memory size of 64M and probe correct size later in SoC init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-05-21 19:48:17 +02:00
Sebastian Hesselbarth 98a8c2f28b arm: initial support for Marvell Dove SoCs
This commit adds minimal support for the Marvell Dove SoC (88AP510) as
first SoC of the Marvell Orion family. Orion SoCs have a different timer,
therefore current mach-mvebu and Armada 370/XP Kconfig and Makefiles are
slightly modified and a new clocksource drivers is added.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-05-15 07:39:27 +02:00