This function consists of only inline asm statements, so
use assembly in the first place. Also makes sure that the
function is compiled in arm mode.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
No need to do this so early. We can't print anything right
now anyway, so there is no need to setup vectors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
There is no need to call a_init before relocation, so rename
the function to omap3_core_init and call it from board code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
board_init initializes the mux and sdram. For both there is no
need to configure this so early. Move the code to a pure_initcall
and remove the surrounding unneeded code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
Setting up the clocks does not work when the stack is in SDRAM.
Moving the stack to SRAM allows us to do the lowlevel clock setup
later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
The X-loader startup relocates to SRAM anyway, so there
is no need to be runnable from flash for the clock code.
This config is disabled in all defconfigs anyway, so remove
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
this will allow to create it's own env/config
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to create it's own env/config
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to create it's own env/config
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to switch omap3 to standard organisation
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
in commit commit f60f6c58e
atmel_mci: check for device id we use to address the right slot
the driver use the dev_id to detect the slot which is wrong on 9263 as we have
2 devices with 2 slots
use slot_b paramter to specify the slot as done in linux
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to configure the nand as example
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When CONFIG_OMAP_BUILD_IFT is selected, the
target image name was set to "barebox.bin.ift".
This file must be renamed "MLO" before it can
be used on the SD card.
Make this as default behavior.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enable the flag HAVE_NOSHELL to allow first stage
bootloader to be built for this board.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The base address passed for device "omap-hsmmc" was
incorrectly passed as OMAP_I2C1_BASE and the base
address for device "i2c-omap" was hardcoded to
0x4809C000 which, in fact, refers to OMAP_MMC1_BASE.
Similarly, in call to add_usb_ehci_device(), addition
is not required if right base address is used.
In fact, 0x48064700 (used as base in the addition)
falls in the OHCI Address space.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The config option CONFIG_GPMC is renamed to
CONFIG_OMAP_GPMC as result of this commit:
819f416b86
Still, sources continue to use CONFIG_GPMC.
Fix it.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
use ds3 for heartbeat and ds5 for dfu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
on 9269 and 9g20 the sram are mirrored at then of the bank so we can join them
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without num_modes the imx fb driver won't work. Specify this
in the boards and also bail out in the driver when num_modes
is unspecified.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using SSP1 since this is the default configuration.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this was introduced in "6b3e01a arm: eukrea: Fix compilation warning"
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
enable serial and dfu at the same time
senario if the usb device is plugged and the BP is not pressed at boot time
during 5s the usbserial will be enable
disable zlib support to fit in the 256K
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The lowlevel init function was a 1:1 copy from the babbage
baord, so it should be safe to switch to the generic C
lowlevel init.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Eric Benard <eric@eukrea.com>
Reimplement the code from lowlevel.S in C. It is run
from SDRAM anyway, so we can safely do this initialization
in a regular barebox environment instead in Assembly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- move code which can be shared between i.MX53 and i.MX51
to a common file
- rename mx53_init_lowlevel to imx53_init_lowlevel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
a) use the more CPU specific S3C* macro names
b) move the register description out of the way, as more recent CPUs using a
different layout and more features
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Keep common code in the MACH instead of re-inventing it in each platform.
Also use S3C* macros for all memory related register.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The UART is one of the units which differs only slightly inside the S3C family.
Prepare this driver to share it with more recent CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
After separation and after all S3C macros are now present, change the driver
to be more generic for future additions.
The timer registers in the S3C24XX family are only 16 bit wide. But these
registers can be read and written in a 32 bit manner. This is important to share
code with more recent CPUs which comes with 32 bit registers.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most members of the S3Cxxxx family share similar timer units. But they are
not really register compatible. To reflect this, use a separate name space for
the S3C family.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch just move the clocksource functions out of the generic.c source file
to handle it on a per CPU base later on.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are major differences in the clock tree of the S3C24xx family and the
more recent CPUs of the S3C family. Keep the S3C24XX clock routines separate to
avoid an ifdef hell. But also use generic function names to be able to
share drivers among the S3C family.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This LCD driver is for the LCD controller in the S3C2410/S3C2440 CPUs only.
Change its name to reflect its usage and free the way to add LCD controller
drivers for more recent Samsung CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The aready existing NAND controller driver in Barebox is for the S3C24XX family
only. Change the name of the file to reflect this fact (and free the way to add
more recent Samsung NAND controllers)
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Start with renaming files to share them in the S3C CPU family,
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The S3Cxxxx family consists of ARMv4, ARMv5 and ARMv6 types of CPU cores. The
S3C24xx sub family is only one of it. To be able to handle all CPUs in one mach
directory, use a more generic name for it.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds basic support for the mx28-evk board. Debug UART, MMC and FEC
have been successfully used.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recent gcc generates code with unaligned access when architecture
supports it. Setting A bit unconditionally causes data-aborts on such
code rendering barebox unusable.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When executing 'bl' in inline assembler, the 'lr' register must be
marked as clobbered too.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In this generic configuration, the board can be run in the
or1ksim simulator with the linux configuration file using
the UART to print the console.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OpenRISC is the original flagship project of the OpenCores community.
This project aims to develop a series of general purpose open source
RISC CPU architectures.
A team from OpenCores provided the first implementation, the OpenRISC
1200, written in the Verilog hardware description language.
Even though I should have created an mach-or1200 directory, it is not
necessary for now. The OpenRISC 1200 CPU is the only one available and
it will be for some time.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
detect it at boot time
if the user button is pressed 5s and the vbus is 1 start the dfu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
drop irq id and rebase instead of of offset
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this device controller is present on rm9200/9260/9g20/9261/9g10/9263
the 9g45 use an other IP
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Support the setup of the mmc voltage, when booting OMAP4 with twl6030
from nand.
Signed-off-by: Alexander Aring <a.aring@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Added i2c support for omap4. Tested on pcm049.
Driver based on linux kernel implementation.
Also added a shift to access 16-bit registers
to make support for OMAP730/850 possible.
If accessing a non existing slave the bus will go into arbitration mode.
It's unable to recover from it.
Signed-off-by: Alexander Aring <a.aring@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a function to remap an IO range into a virtual addresses
range. This is particulary usefull for the few devices
mapped at physical address 0, as the MTD boot devices.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The device resources are much smaller, the resource mechanism
revealed this because of overlapping devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The icache command is unused. Instead of adding it to compilation
again, remove it as the cpuinfo command provides the same information.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
configure BP4 and BP3
use BP4 to start DFU mode at boot
if BP4 is pressed at boot time and maintain at least 5s the dfu is started
otherwise we boot normaly
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
by default boot from nand with the bootstrap as first stage
update the smc config for 9g20-ek
switch to defaultenv
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD
Sanjeev Premi
Juergen Kilb
Wolfram Sang
Eric Bénard
Juergen Beisert
Enrico Scholz
Franck Jullien
Alexander Aring
Robert Jarzmik
Daniel Mack