Kconfig and make files are updated to build the Freescale P1022DS
image.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The eTSEC 2.0 devices found on the 85xx family of SoCs support stashing
buffer descriptors in the L2 cache. This updates the device tree fixup
for these devices to ensure that the stashing related properties used
by Linux are initialised correctly.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the Freescale P1022DS. Driver support is limited to:
- I2C
- Ethernet
- Serial
- NOR flash
- PIXIS FPGA
System clock configuration is read from the FPGA but has only been
tested using a 133MHz system clock and 100MHz DDR clock.
Boot arguments are defined in the environment to boot over NFS with
a console configured at 115200 bauds.
Enabling branch prediction is moved from board support to the platform
support for all boards as it is a CPU feature.
Some the code is from U-Boot version git-be937b5.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add DDR3 support into the MPC8xxx DDR driver.
To avoid confusion, the function set_ddr_sdram_mode is renamed
set_ddr2_sdram_mode.
Checking for errors is simplified in the DDR2 DIMM parameters
computation to be consistent with DDR3.
This code is derived from the files found in directory drivers/ddr/fsl
from U-Boot version git-be937b5.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add DDR3 SPD verification support for use by the PPC 8xxx DDR driver.
This is based on the equivalent files from U-Boot version git-be937b5.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CPU, DDR, and LBC definitions are added to support the Freescale P1022.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver is dts-only version of driver from Linux v3.14-rc5.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds minimal support for the DaVinci DM365 SoCs
from Texas Instruments.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This macros are used in exported from linux TI DaVinci code.
Also this macros are used in MIPS cache support code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For memory reaching the end of the address space
phys + bank->size overflows to 0. Fix this by right shifting
phys and bank->size before adding them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sean Cross <xobs@kosagi.com>
- If we have no memory registered in mmu_init() it's a critical bug.
panic in this case.
- If we do not have a ttb when dma_alloc_coherent or remap_range is
called it's also a critical bug. Panic in this case.
- if find_pte is called with an address outside our memory banks dump
the memory banks and the address to give more clue what went wrong.
Also add some hints what might went wrong to the code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the splash command silently fails when no renderer is found for
an image type. Print an error message in this case.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To ease DT import from Linux, which is still maintained in-tree, we
separate barebox-specific changes by including the original dts in
a separate DT file. This allows to overlay modifications and keep
clean DT history. Additionally, this patch updates i.MX27 DTS tree.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The commit
ARM: Make ENTRY_FUNCTION more robust
changed the behaviour of the ENTRY_FUNCTION. For the Socrates the call to
__barebox_arm_head() was not removed. Do so now otherwise the Socrates will
not be able to boot barebox.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Was tested on NAND with {writesize=4096, oobsize=224} and
{writesize=2048, oobsize=64}.
This patch will not break any NAND that was working
before. Implemented calculation way may be used for other NAND chips
with writesize == 2048 but oobsize != 64.
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Grigory Milev <g.milev@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since i.MX6 has only one R/B actual pin, if there are several R/B
signals (from different NAND chips) they must be connected to this
pin.
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Grigory Milev <g.milev@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since MTD is already supports >= 4GB device sizes it is better to
allow ubi valumes also be created of larger sizes.
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Grigory Milev <g.milev@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MTD internal API presently uses 32-bit values to represent device
size. This patch updates them to 64-bits but leaves the external API
unchanged.
In general, changing from 32-bit to 64-bit values cause little
or no changes to the majority of the code with the following
exceptions:
- printk message formats;
- division and modulus of 64-bit values (mtd_div_by_wb,
mtd_div_by_eb may be used in some of such cases).
Was tested on phyFLEX i.MX6.
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Grigory Milev <g.milev@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- enable more commands :
(menu, password, loadb, let, mm, sha*, bootz, of*, memtest)
- enable led and led triggers
- enable sata support
- enable USB chipidea support
- enable USB network drivers
- enable NFS and DNS support
- enable EXT4 support
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ ata0.probe=1
imx-sata 10000000.sata: port 0: SATA link ok
imx-sata 10000000.sata: port 0: Spinning up device...
imx-sata 10000000.sata: port 0: ok.
ata0: registered /dev/ata0
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- declare the rigth mux for the GPIO used to enable the USB's 5V
- enable USB host controller
tested on i.MX53 START-R :
barebox@Freescale i.MX53 Quick Start-R Board:/ usb -f
USB: scanning bus for devices...
Bus 001 Device 001: ID 0000:0000 EHCI Host Controller
Using index 0 for the new disk
Bus 002 Device 003: ID 0951:1654 DT R500
Bus 002 Device 002: ID 0000:0000 EHCI Host Controller
3 USB Device(s) found
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I accidently merged the initial data device node which contained
clocks in the sata node which were not compatible to the ones
in the kernel. Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With this barebox can start root filesystems containing bootloader
spec entries via NFS. It is used as:
boot nfs://<ipaddr>[:<port]//path/to/nfsroot
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The defaultenv-2 has ifup support as a shell script. This patch
replaces it with a command which is more robust, can be called
from C and now can also bring up all configured interfaces.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Renaud Barbier
Antony Pavlov
Sascha Hauer
Alexander Shiyan
Steffen Trumtrar
Dmitry Lavnikevich
Eric Bénard