Here is a test output:
barebox 2012.07.0-00136-ge3ab4bc-dirty #23 Tue Jul 3 23:10:44 MSK 2012
Board: Phytec phyCORE-i.MX27
mc13xxx-spi@mc13xxx-spi0: Found MC13783 ID: 0x00009b [Rev: 3.1]
cfi_flash@cfi_flash0: found cfi flash at c0000000, size 33554432
NAND device: Manufacturer ID: 0x20, Chip ID: 0x36 (ST Micro NAND 64MiB 1,8V 8-bit)
Bad block table found at page 131040, version 0x01
Bad block table found at page 131008, version 0x01
imxfb@imxfb0: i.MX Framebuffer driver
cfi_protect: protect 0xc0080000 (size 1048576)
Using environment in NOR Flash
Found NXP ISP150x ULPI transceiver (0x04cc:0x1504).
ehci@ehci0: USB EHCI 1.00
imx-mmc@mci0: registered as mci0
Malloc space: 0xa6f00000 -> 0xa7efffff (size 16 MB)
Stack space : 0xa6ef8000 -> 0xa6f00000 (size 32 kB)
running /env/bin/init...
Hit m for menu or any other key to stop autoboot: 3
type exit to get to the menu
barebox@Phytec phyCORE-i.MX27:/ mci0.probe=1
mci@mci0: registered disk0
barebox@Phytec phyCORE-i.MX27:/ devinfo mci0
resources:
driver: mci
Card:
Attached is an SD Card (Version: 1.10)
Capacity: 1962 MiB
CID: 1C535653-44432020-1000013C-7E007200
CSD: 005E0032-5F5A83D5-2DB7FFBF-96800000
Max. transfer speed: 25000000 Hz
Manufacturer ID: 1C
OEM/Application ID: 5356
Product name: 'SDC '
Product revision: 1.0
Serial no: 81022
Manufacturing date: 2.2007
Parameters:
probe = 1
barebox@Phytec phyCORE-i.MX27:/ mkdir /d
barebox@Phytec phyCORE-i.MX27:/ mount /dev/disk0.0 fat /d
barebox@Phytec phyCORE-i.MX27:/ ls /d
barebox.bin
barebox@Phytec phyCORE-i.MX27:/
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
While a set bit enables the pullup (if exists) it disables the bitkeeper (if
exists). Both features are using the same register bit and only one of this
feature is present on a per pin base.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We have the following in the tree:
|commit af42feb9d2
|Author: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
|Date: Mon Jan 2 11:49:17 2012 +0100
|
| ARM: set SCTRL[A] only when architecture does not support unaligned access
|
| Recent gcc generates code with unaligned access when architecture
| supports it. Setting A bit unconditionally causes data-aborts on such
| code rendering barebox unusable.
|
| Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
What the patch tried is correct: We should set the A bit only when the architecture
does not support unaligned accesses. To figure out whether the architecture supports
unaligned accesses the patch tested for the U bit which is wrong. The U bit may be
0 after a reset, so instead of testing for the U bit we have to set it. This can
be done on armv6 and later. All others have the A bit set to trap unaligned accesses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Storing the size instead of the resource end in struct resource was
a mistake. 'size' ranges from 0 to UINT[32|64]_MAX + 1 which obviously
leads to problems. 'end' on the other hand will never exceed
UINT[32|64]_MAX. Also this way we can express a iomem region covering
the whole address space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since we now can change HCLK and VDDIO, we can now support writing to
OCOTP. Writing is done via a special data register. This is u32, so we
need to fill a temporary buffer when offset or count is not aligned. The
write is also protected by a special device variable.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Will the code more readable, especially since future additions are
planned.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Let's keep the timeout routine in a central place. We will need it more
often when we add write support.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
usbphy initializaion needs to access the power supply and has this
embedded. Refactor to a seperate power.c, since we need other accesses
in the future.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently the watchdog is occupied for system reset. This usage collides with
the dedicated usage of a watchdog. This patch change the behaviour of at least
i.MX23/i.MX28 where the chipset supports a simple and powerful alternative
to reset the whole SoC (including the PMIC).
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We write a proper FCB, but no DBBT since it is unresolved how to keep it
in sync with Linux-based BBTs. Also, we imply searchcount = 4 and stride
= 64 (which is the default) until we can verify via ocotp.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Based on the U-Boot version. Changed to kernel style register layout, added
MX23 support (WIP!), made MMU aware and adapted to barebox.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Based on the U-Boot version. Changed to kernel style register layout, added
MX23 support, made MMU aware and adapted to barebox.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To avoid getting a different divider due to rounding errors when using
set_hclk later, use DIV_ROUND_UP for the returned value.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This change is necessary because valid source argument for the clko command
can be negative.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
dma_alloc() allocates memory aligned to cache lines. We have to use
cache line aligned buffers if a driver calls dma_inv_range on the
buffer.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch add dma_alloc to existing dma-mapping.h. On nios the mem is
aligned to D_ACHE_LINE_SIZE.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some drivers call dma_inv_range() on buffers, on arm these buffers must
be cache line aligned. This patch introduces a generic dma_alloc,
dma_free. Archs can implement in their own functions in "asm/dma.h" and add a:
#define dma_alloc dma_alloc
#define dma_free dma_free
On all other archs the generic versions, which translate into xmalloc
and free are used.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>