remap_range is for remapping regions with different cache attributes.
It is implemented for ARM and PowerPC only, the other architectures only
provide stubs.
Currently the new cache attributes are passed in an architecture specific
way and the attributes have to be retrieved by calls to
mmu_get_pte_cached_flags() and mmu_get_pte_uncached_flags().
Make this simpler by providing architecture independent flags which can
be directly passed to remap_range()
Also provide a MAP_ARCH_DEFAULT flag and a arch_can_remap() function.
The MAP_ARCH_DEFAULT defaults to whatever caching type the architecture
has as default. the arch_can_remap() function returns true if the
architecture can change the cache attributes, false otherwise. This
allows the memtest code to better find out what it has to do.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This introduces the bitsperlong.h file for the remaining architectures.
It's purpose is to define BITS_PER_LONG which in the next step can be used
by a generic posix_types.h file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of letting all architectures define their own dma_addr_t use
a common place in include/linux/types.h and use a Kconfig symbol that
architectures can select to define the width of dma_addr_t. The same
is done in the Kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a minimal Integrated Flash Controller header file and new
definitions to support the P1010 SOC.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ppc implementation is identical to the generic implementation, so
use the generic one instead.
Also add the missing __ffs function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
arch/ppc/boards/freescale-p1022ds/ddr.c: In function 'fsl_ddr_board_info':
arch/ppc/boards/freescale-p1022ds/ddr.c:39:21: warning: assignment discards 'const' qualifier from pointer target type [enabled by default]
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add DDR3 support into the MPC8xxx DDR driver.
To avoid confusion, the function set_ddr_sdram_mode is renamed
set_ddr2_sdram_mode.
Checking for errors is simplified in the DDR2 DIMM parameters
computation to be consistent with DDR3.
This code is derived from the files found in directory drivers/ddr/fsl
from U-Boot version git-be937b5.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CPU, DDR, and LBC definitions are added to support the Freescale P1022.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support to enable caching on a memory region during the memory test.
Tested on P2020RDB and DA923RC.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Removed the ppc bit operation functions and definitions in the ppc
file asm/bitops.h since these are already defined in the asm-generic header
files. Moved ffs64 definition to the mpc85xx header files because
the function requires the inclusion of linux/log2.h which also includes
asm/bitops.h.
The conflict was noted when UBIFS was enabled in barebox.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Import U-Boot start-up code from version git-9407c3fc to include the
latest CPUs errata and make future U-Boot code inclusion easier. The
code import is limited to the currently supported CPUs P2020/MPC8544.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
TLB support for the 85xx CPUs has been upgraded to support the MMUv2
page size definitions. This has been imported from U-Boot version
git-9407c3fc. This allows for future CPUs to make use of the new MMU
support.
Also the definition of MAX_MEM_MAPPED has been changed to avoid type
casting with "min" macro.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Definitions are added to support the mpc8544 sOC.
The function returning the I2C bus frequency is updated
to take into account the mpc8544 specific clock ratio.
A mininal GPIO API is added to enable and set the GPIO
out pins.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For the MPC85xx family of SOCs Linux expects any boot firmware
information to be passed in the first 64MiB of memory. This adds support
to ensure that the device tree is relocated to a valid location if it is
outside that address range.
For the other SOC family currently present in the ppc architecture, the
default is not to relocate as at Linux startup the virtual address
equals the physical address.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for populating derived properties of the mpc85xx SOC
which are not typically included in the dtb directly.
This update is based on U-Boot code from common/fdt_support.c
and arch/powerpc/cpu/mpc85xx/fdt.c - version git-2b26201.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The early initialisation of chip select 0 (boot flash) is removed
from cpu initialisation. This removes the dependency on board
base address definition.
Consequently, cpu_init_f is not called in the start-up code but
added to the init call list as cpu_init_r. Also the file
arch/ppc/mach-mpc85xx/fsl_lbc.c is deleted.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Definitions and structures have been added to record DIMM parameters
and configure memory options.
The code is based on the equivalent files in the directory
arch/powerpc/include/asm from U-boot version git-a71d45d.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ppc does not implement these, so remove the prototypes and use
the ones from include/linux/string.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The I/O accessors in_bexx, out_bexx, in_lexx and out_lexx are updated
to the latest Linux version.
The patch is tested on a MPC8544 based board and solved I/O access
issues on I2C devices.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To prepare for an update of the I/O functions to the latest Linux
version, the indentation is fixed.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Change function remap_range in arm architecture to make it
global accessable. For example command 'memtest' can change
pte flags to enable or disable cache.
Add dummy function for others architectures that doesn't
have mmu or pte support.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This file is copied from Linux 2.6.39. It is added so that the P2020RDB
can still build.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i2c-imx driver is able to support the I2C bus on the 85xx machines
with minor modifications. It already defines register offsets. Therefore,
this header file is no longer needed.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some drivers call dma_inv_range() on buffers, on arm these buffers must
be cache line aligned. This patch introduces a generic dma_alloc,
dma_free. Archs can implement in their own functions in "asm/dma.h" and add a:
#define dma_alloc dma_alloc
#define dma_free dma_free
On all other archs the generic versions, which translate into xmalloc
and free are used.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is the first part of the start-up code. The source code origin is
U-boot and is slightly modified to have e500v2 CPU support in 32-bit
mode only.
It includes the power-up entry point, CPU initialization code and
exports definition for D-cache flush and I-cache invalidate.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These header files are added to provide a minimal support to the
Freescale 85xx cpu to boot on a P2020RDB platform.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Following the MMIO primitives fix, the definitions of __raw_* function
is sourced from Linux and added.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch/ppc/Kconfig is reworked to make the configuration environment
architecture neutral. All MPC5200 configuration is moved to the
MPC5200 architecture specific configuration file. These modifications
are reflected in the PCM030 board support.
arch/ppc/Makefile compilation directives are updated in preparation
for the introduction of future cpus/machines.
lib/time.c is moved to the architecture specific directory and the
building instructions updated in the Make files. The file is
cleaned up of unused code.
The definition of L1_CACHE_... is updated and CACHELINE_SIZE is
defined in ppc/include/asm/cache.h for future use by the mpc85xx.
The file mach-mpc5xxx/pci_mpc5200.c and mach-mpc5xxx/start.S are
updated accordingly.
The declaration of search_exception_table is moved in
include/asm/common.h because it is used across architectures.
mach-mpc5xxx/traps.c is also updated to reflect this change.
The definition of exception in asm/ppc_asm.tmpl is updated for future
use by the mpc85xx. The file starts.S in mach-mpc5xxx is updated
accordingly.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>