The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provide setup for SPI clk frequency global to driver.
For MC13783 maximum clock frequency is 20 MHz,
for MC13892 maximum clock frequency is 26 MHz,
so we define 20 MHz as a maximum SPI clk.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Among other things the power initialization also turns on power
for the ethernet phy, so register the fec after power init.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This got broken while updating the iomux definitions from the
kernel. Since then the PMIC did not work anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also definition can be modified in arch/arm/boards/pcm043/lowlevel.c,
but I am not sure is we can call imx_silicon_revision() from
board_init_lowlevel().
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This means using an uint64_t instead of a struct pad_desc which allows
us to change pad settings using logic operations. Also with this we
can more easily keep the iomux tables in sync with the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Because CPU frequency setup called after power initialization,
this call now is not necessary.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The imx51 lowlevel setup code currently sets the full cpu
speed only for TO3. It turned out that this is not a TO
specific hack but a hack for older babbage boards. Move
the lowlevel init after babbage_power_init() so that we
can remove the hack from the generic i.MX51 lowlevel
function. As this potentially changes the UART clock we
have to flush the console beforehand and call the clock
notifier afterwards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The new MMU setup will need SDRAM base addresses and sizes.
For this reason convert the MMU enabled ARM boards:
- move mem setup to mem_initcall. This is early but
still makes sure that we already have the console available
- move MMU setup in this initcall temporary as after the mmu_init will generic
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Add a helper function for boards to register their memory
devices. This makes the board code smaller and also helps
getting rid of map_base and struct memory_platform_data.
And switch all of the memory to it
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
we keep struct memory_platform_data for now on we will switch off the memories
resources to struct resource
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Often enough the exception vectors are not on TEXT_BASE (for example
on i.MX SoCs in internal boot mode), so the board specific code did
not map the exception vectors to 0x0 but whatever happens to be on
TEXT_BASE. Also, the current section-only mapping requires the
exception vectors to be on a 1MB boundary.
Instead, create the possibility to create second level tables and
use this to map a copy of the exception vectors in a board
independent way.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Alexander Shiyan
Jean-Christophe PLAGNIOL-VILLARD