this will reduce and simplify defconfigs maintainance
it will also save some disk space
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
this rework is done in order to add a phylib and allow to have phy driver support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add OMAP3 architecture specific dcache flush back in.
Commit 78104ae181 isolates
the cache handling to appropriate handlers, but certain
architectures may need special handling esp during boot
time.
without this patch, building barebox with
omap3530_beagle_per_uart_defconfig
and attempting to use peripheral download with pusb/pserial
will fail as OMAP ROM code depends on 2nd stage bootloaders
to clean up things.
Discussion Thread: http://www.spinics.net/lists/u-boot-v2/msg01286.html
Cc: Michael <mgr@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will be re-add as mach-at91
for now on keep the net driver which will be updated to new API
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This driver provides an interface for programming and sensing the IIM fusebox
which is present on some i.MX chips.
Since the IIM io addresses of the controlling registers and each fuse bank are
are not contiguous the driver implementation uses two drivers, imx_iim, and
imx_iim_bank. The imx_iim is the "parent" driver for a device holding the
map_base address of the control registers. The imx_iim_bank driver is for
child devices holding the map_base of each fuse bank. The platform code then,
instantiate one imx_iim_bank device per fuse bank.
Fuses blow is a dangerous operation. Thus, the fuses blow functionality can be
disabled independently at configuration time. On run time this functionality
must be enabled explicitly by setting the permanent_write_enable parameter.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows the use of IIM registers from code which is not mx35 specific.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
with cm-regbits-34xx.h and codebase from linux kernel
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
with the following support
uart 0 & 1
network
nand
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Andrea GALLO <andrea.gallo@stericsson.com>
Cc: Gael SALLES <gael.salles@stericsson.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this implementation is based on linux one (v2.6.35-rc5-76-gd0c6f62)
it will calculate all the clock dynamically instead of statictly
this will use also the new clock framework
it will also print the clock status after the console init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Apparently, the UID is little-endian. Reverse endianess, and add a note in
comment.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In omap3_clock_core.S we have just clock values for the ES2
revision, so we should not set any silicon index.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow each arch to handle the boards more simply and depending on
there need
the env var BOARD will refer to the current board dirent
for sandbox as we have only one board the board dirent is arch/sandbox/board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Jean-Christophe PLAGNIOL-VILLARD
Sascha Hauer
Nishanth Menon
Michael Grzeschik
Baruch Siach
Eric Bénard