Mostly to make it clear that boarddata needs to be
something we can dereference.
As this is a pretty invasive change, use the opportunity
to make the signature 64bit safe.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We want to check whether boarddata contains a valid dtb if it's inside
valid memory. This includes the base of SDRAM, so use '>=' instead of '>'.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A lot of files rely on include/driver.h including include/of.h (and
this including include/errno.h. include the files explicitly so we can
eventually get rid of including of.h from driver.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When using CONFIG_MMU_EARLY combined with CONFIG_PBL_IMAGE, the barebox
setup reuses the MMU setup from the PBL, but doesn't setup the cache
functions.
Set these up to guarantee proper early cache handing before mmu_initcall().
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The data caches should be invalided once during startup. This should
also be done when we do not have the MMU enabled in barebox because
the Kernel does not invalidate the caches during start.
To make this sure this patch enables the arm_early_mmu_cache_invalidate
function even if MMU support is disabled. Additionally this patch adds
calls to arm_early_mmu_cache_invalidate in start.c and uncompress.c.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Addionally to having a builtin DTB provide the possibility for
the board to provide a dtb via boarddata.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some SoCs come up with invalid entries in the data cache. This can
lead to memory corruption when we enable them later, so invalidate
the caches early.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Lucas Stach <l.stach@pengutronix.de>
The comment above barebox_arm_entry promises to preserve the boarddata
variable passed to it which can then later get back with
barebox_arm_boarddata(). This function was missing so far, add it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For making the same binary executable on different SoCs which have
different DRAM addresses we have to be independent of the compile
time link address.
This patch adds relocatable binary support for the ARM architecture.
With this two new functions are available. relocate_to_current_adr
will fixup the binary to continue executing from the current position.
relocate_to_adr will copy the binary to a given address, fixup the
binary and continue executing from there.
For the PBL and the real image relocatable support can be enabled
independently. This is done to (hopefully) better cope with setups
where the PBL runs from SRAM or ROM and the real binary does not.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This optionally enabled the MMU in the PBL or during early startup for
the non PBL case. The regular MMU init code will pickup the already enabled
MMU later. This might complicate debugging early code, so this has been
made optional.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Memory is a precious resource, so it makes sense to make it available as
early as possible. By definition the lowlevel init code already knows where
to find memory because it's the lowlevel init code which sets up the memory.
Until all boards are converted this new entry is just a fallback to the old
entry point.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
start() for the PBL case is a duplicate of board_init_lowlevel_return().
Instead of duplicating it just call it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sometimes Assembler beats C. In this case a small assembler
function called without parameters can:
- copy a binary to its link address
- clear the bss
- return to the same position in the copied binary
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On some SoCs (for example AM35xx), the ROM bootloader passes useful
information in r0 when jumping to barebox.
To avoid overwriting this in the generic reset code, we introduce
common_reset as a C function and as an assembler macro. This is then
called form the reset entry point (either in common or in board code).
This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current approach to get the offset between link and runtime address
is fragile. It requires a big fat comment to put no code above it and it
requires an extra linker section. Instead use a small assembler function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows for creating a pre-bootloader binary for
- nand boot
- mmc boot
- compressed image
The pbl will be incharge of the lowlevel init if needed.
The barebox will skip it.
Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
implement a dummy panic.
For now on introduce dummy zbarebox* targets and c code that will contain later
the decompressor. This only implemeted on ARM.
This patch is based on Sascha Hauer <s.hauer@pengutronix.de>
Add compressed image support patch
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
start.c has nothing to do with the exception vector table anymore,
so move it next to the exception handling code in exceptions.S
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Calculating the offset between runtime and linked address makes the
intention of the binary copy function a bit more clear.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We have the following in the tree:
|commit af42feb9d2
|Author: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
|Date: Mon Jan 2 11:49:17 2012 +0100
|
| ARM: set SCTRL[A] only when architecture does not support unaligned access
|
| Recent gcc generates code with unaligned access when architecture
| supports it. Setting A bit unconditionally causes data-aborts on such
| code rendering barebox unusable.
|
| Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
What the patch tried is correct: We should set the A bit only when the architecture
does not support unaligned accesses. To figure out whether the architecture supports
unaligned accesses the patch tested for the U bit which is wrong. The U bit may be
0 after a reset, so instead of testing for the U bit we have to set it. This can
be done on armv6 and later. All others have the A bit set to trap unaligned accesses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Traditionally we call __mmu_cache_flush in early startup. There
is a problem with armv7 and hierarchical caches though, on these
systems __mmu_cache_flush uses the stack. Appearantly this was
seldomly a problem, because most of these systems have a ROM
bootloader which sets up some stack, but on a special i.MX6 system
this failed badly. We should not have to flush caches here. Every
sane system should pass control to the bootloader without stale
entries in the caches *), so it should be a safe assumption that the
cache flush can be removed.
Since __mmu_cache_flush is not called from early code anymore we can
also move it to the regular text section.
Be brave and give it a try.
*) omap3 seems to be a exception to this, but this has a cache flush
in arch_init_lowlevel already
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox can startup with I-cache enabled, so to be on the safe
side we should invalidate the I-cache before jumping to a binary
we just copied in place.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If we want to trap the processer in the exception vectors
we have to use unconditional branch instructions. I don't
know what I thought when using bne :-/
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This shrinks the resulting binary size by ~25%. Exceptions
are still handled in arm mode, so we have to explicitely
put .arm directives into the exception code. Thumb-2 mode
has been tested on i.MX51 Babbage board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to get the runtime offset of the board_init_lowlevel_return
by doing a &board_init_lowlevel_return. This does not work in thumb-2
mode, so use a separate linker section for this function instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Traditionally U-Boot and barebox have the exception vectors at
the start of the binary. There is no real reason in doing so,
because in the majority of cases this data will not be at 0x0
where it could be used as vectors directly anyway.
This patch puts the vectors into a separate linker section and
defines an head function which is placed at the start of the
image instead. Putting this in a separate function also has
the advantage that it can be placed at the start of images
which require an additional header like several Freescale i.MX
images. As the head function contains the barebox arm magic
those images can now also be detected as barebox images.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recent gcc generates code with unaligned access when architecture
supports it. Setting A bit unconditionally causes data-aborts on such
code rendering barebox unusable.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When executing 'bl' in inline assembler, the 'lr' register must be
marked as clobbered too.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The exception vector at 0x14 is not used on arm, so no need
to bind this address to a exception handler. Remove the
corresponding code
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is useful to detect a barebox image and to be able
to copy only the image size if barebox is stored on
raw partitions which are bigger than the image.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On several boards without MMU support the vectors cannot be mapped
to 0x0 and exception support is nonfunctional anyway, so make this
configurable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Lucas Stach
Sascha Hauer
Andre Heider
Jan Luebbe
Jean-Christophe PLAGNIOL-VILLARD
Antony Pavlov
Enrico Scholz
Krzysztof Halasa