detect the cpu model to dynamise the periphs mapping
currently only tested on qemu but should work on real hardware
Cortex-A9
if you use 1GiB of ram you can run the same barebox on Cortex-A15 or Cortex-A9
otherwise use vexpress_ca9_defconfig where the TEXT_BASE is at 0x63f00000
when we will add the relocation support this defconfig will be drop
qemu/arm-softmmu/qemu-system-arm -M vexpress-a9 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash0 -nographic
Cortex-A15
qemu/arm-softmmu/qemu-system-arm -M vexpress-a15 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash0 -nographic
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
reset is confusing with the cpu reset and impossible to grep
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Memory is a precious resource, so it makes sense to make it available as
early as possible. By definition the lowlevel init code already knows where
to find memory because it's the lowlevel init code which sets up the memory.
Until all boards are converted this new entry is just a fallback to the old
entry point.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Hi Sascha,
I've made the changes you suggested in this resent patch.
Everything related to custom ATAGs has been moved to the board
directory.
The generic code does not make any references to feature lists or
bootloader versions.
About the setup_feature_list prototype:
it has been renamed to atag_appender
it's not a function, it's a pointer to a function. Can it have a
prototype other than it's own declaration?
All non-related changes has been dropped. They were checkpatch.pl
warnings unrelated to this patch.
Regards,
Vicente.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Change function remap_range in arm architecture to make it
global accessable. For example command 'memtest' can change
pte flags to enable or disable cache.
Add dummy function for others architectures that doesn't
have mmu or pte support.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We allow unaligned accesses on ARMv6 onwards, make sure the CR_A
flag is cleared so that unaligned accesses do not trap.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The different ARM architectures need different cache functions. This
patch makes them selectable during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Once we run on multiple SoCs we must know which arm architecture we
are on. Add cpu_architecture() from the kernel to detect it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sometimes Assembler beats C. In this case a small assembler
function called without parameters can:
- copy a binary to its link address
- clear the bss
- return to the same position in the copied binary
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On some SoCs (for example AM35xx), the ROM bootloader passes useful
information in r0 when jumping to barebox.
To avoid overwriting this in the generic reset code, we introduce
common_reset as a C function and as an assembler macro. This is then
called form the reset entry point (either in common or in board code).
This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is unused now and not needed. We have a board_init_lowlevel. If a
board needs some architecture setup it can always call it from its
board_init_lowlevel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is unused now and not needed. We have a board_init_lowlevel. If a
board needs some architecture setup it can always call it from its
board_init_lowlevel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current approach to get the offset between link and runtime address
is fragile. It requires a big fat comment to put no code above it and it
requires an extra linker section. Instead use a small assembler function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This function returns the offset between the address barebox is linked at
and the address barebox is currently running at.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is needed by at91 to specify the size of the binary to load from the
bootrom when booting for non nor flash.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We need inline versions of armlinux_set* exactly when
CONFIG_ARM_LINUX is not set, because this is the symbol
used to compile the non inline versions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
dma_alloc() allocates memory aligned to cache lines. We have to use
cache line aligned buffers if a driver calls dma_inv_range on the
buffer.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This shrinks the resulting binary size by ~25%. Exceptions
are still handled in arm mode, so we have to explicitely
put .arm directives into the exception code. Thumb-2 mode
has been tested on i.MX51 Babbage board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to get the runtime offset of the board_init_lowlevel_return
by doing a &board_init_lowlevel_return. This does not work in thumb-2
mode, so use a separate linker section for this function instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Traditionally U-Boot and barebox have the exception vectors at
the start of the binary. There is no real reason in doing so,
because in the majority of cases this data will not be at 0x0
where it could be used as vectors directly anyway.
This patch puts the vectors into a separate linker section and
defines an head function which is placed at the start of the
image instead. Putting this in a separate function also has
the advantage that it can be placed at the start of images
which require an additional header like several Freescale i.MX
images. As the head function contains the barebox arm magic
those images can now also be detected as barebox images.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least ARM allows us to dump the stack, but we currently
have no prototype for this. Add a dump_stack prototype and
provide a static inline function for architectures without
stack dump support. Also, call dump_stack() in panic() to
provide more information in the case of a panic.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a function to remap an IO range into a virtual addresses
range. This is particulary usefull for the few devices
mapped at physical address 0, as the MTD boot devices.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
whoever calls this function is not necessarily aware of a struct
image_data, so remove the dependency from the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
By doing this we can remove the ptes field in struct arm_memory
which won't be present in a generic memory bank structure anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In barebox we used 1MiB sections to map our SDRAM cachable. This
has the drawback that we have to map our sdram twice: cached for
normal sdram and uncached for DMA operations. As address space gets
sparse on newer systems we are sometines unable to find a suitably
big enough area for the dma coherent space.
This patch changes the MMU code to use second level page tables.
With it we can implement dma_alloc_coherent as normal malloc, we
just have to remap the allocated area uncached afterwards and map
it cached again after free().
This makes arm_create_section(), setup_dma_coherent() and mmu_enable()
noops.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD
Vicente Bergas
Alexander Aring
Jan Luebbe
Marc Kleine-Budde
Krzysztof Halasa
Robert Jarzmik