HAVE_CONFIGURABLE_MEMORY_LAYOUT was first meant as a feature, now it's a
feature to remove it. barebox on ARM now completely uses the memory passed
in from the lowlevel code and configures the malloc area and stack space
during runtime making it obsolete to hardcode these values.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Defining STACK_BASE and MALLOC_BASE only makes sense when
either CONFIG_MEMORY_LAYOUT_DEFAULT or CONFIG_MEMORY_LAYOUT_FIXED
is set, so use separate #ifdefs instead ot #if/#else
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This optionally enabled the MMU in the PBL or during early startup for
the non PBL case. The regular MMU init code will pickup the already enabled
MMU later. This might complicate debugging early code, so this has been
made optional.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move early mmu code to a separate file so that it can be
used from the pbl and the regular image. Disabling the mmu
can be dropped since the regular mmu code is now able to
pickup an enabled mmu.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the at91sam926x, 9g10 and 9g20 over to barebox_arm_entry.
For these SoCs we currently support reading back the memory size from
the SDRAM controller, so all of these can have a common reset() function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This architecture is a bit strange. It has up to four SDRAM banks, but
all have a quite limited size. The SDRAM size for the different boards
currently is unknown as it's configurable with Kconfig. We use a SDRAM
size based on the value of the only board we have in the defconfigs:
edb9301. This likely breaks other ep93xx boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All Samsung boards automatically detect their SDRAM size. The size detection
code can't be called safely from lowlevel C code, so instead the minimum SDRAM
size is guessed from the defconfig files.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All boards use hardcoded SDRAM addresses, copied from the board init file.
OMAP3 boards are a bit special, they had a SoC specific reset() function. This
is renamed to omap3_invalidate_dcache() and called from the board lowlevel init
code now.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most i.MX boards can use the imx*_barebox_entry functions. The remaining
(i.MX21, i.MX6) use hardcoded base addresses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX will get SoC specific entry points for barebox. To find the
correct one we have to call these from the SoC specific
imx*_barebox_boot_nand_external functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Additionally to the generic entry point the i.MX specific ones
calculate the SDRAM size automatically so the boards do not have
to care.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several i.MX boards setup a temporary stack in their lowlevel code.
Instead of using STACK_BASE use a stack in internal SRAM to get rid
of the STACK_BASE compile time dependency.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Memory is a precious resource, so it makes sense to make it available as
early as possible. By definition the lowlevel init code already knows where
to find memory because it's the lowlevel init code which sets up the memory.
Until all boards are converted this new entry is just a fallback to the old
entry point.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Jean-Christophe PLAGNIOL-VILLARD