As nand_bb_write_buf calls mtd_write(bb->mtd, cur_ofs, now, ...) the
limit that now should be checked against is bb->mtd->size - cur_ofs.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit 39f7a7ee8b ("i.MX: esdhc: Do not rely on CPU type for quirks")
made imx-esdhc dependent on OF and broke probing for all non-OF boards.
Since newer platforms like mx6 and vf610 are restricted to OF, the non-OF
probing only needs to distinguish mx5 vs earlier SoC.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With commit 4ed5b778a5 ("i.MX: i2c: Add Vybrid support") i2c-fsl probe
returns -EINVAL for all non-OF boards.
Since newer planforms, especially vf610 are restricted OF-only it is safe to
assume "fsl,imx21-i2c" if CONFIG_OFDEVICE is not set.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In barebox_non_pbl_start() we do not run at the address we are linked
at, so we must read linker variables using ld_var(). Since ld_var()
current is not available on arm64 we create two zero sized arrays,
one at the begin of the image and one at the end. The difference
between both is the image size we are looking for.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX7 has two pinmux controllers, the regular and the LPSR
controller. The LPSR pinmux controller doesn't have any sel_input
registers, instead they can be found in the regular pinmux controller.
This means whenever we want to apply the the sel_input setting for
the LPSR controller, we have to apply them to the regular controller
instead.
In barebox take the easy way out and just add the difference of the
two base addresses to the register offset. The same issue is present
in the Kernel aswell, but when the bootloader already configured
the pins correctly nobody notices when the Kernel sel_input setup
effectively is a no-op.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reparent ethernet clocks so that they can be used by the
fec driver. The values are the same as U-Boot uses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the Kernel the bypass bits in the PLLs are now registered as
separate clocks and are no longer handled in the PLL code. In
barebox we haven't made this step and there currently seems to
be no reason to do so.
This means that the bypass bits are currently modified in both
the PLL driver and in the separate clocks which does not work
properly. Drop all the bypass clocks to let the bypass bits
be handled in the PLL driver exclusively.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The original clock code from Linux registers some gates at
base + 0x44e0, 0x44f0, 0x4500, 0x4510. These are not in the reference
manual and do not seem to have any effect on the hardware. The
reference manual lists clocks at 0x4700 and 0x4710 which Linux
does not control at all. These clocks really do have an effect on
the hardware and are needed for ethernet support. Register the
existing clocks rather than the made up clocks to support
ethernet.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sometimes a single software control knob controls multiple gates
in hardware. This patch adds support for shared gates which help
coping this situation. The first gate is registered with the hardware
gate as usual, the others are registered as shared gates which does
not have hardware control itself, but only switches the real hardware
gate.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
By the time the i.MX7 clock driver probes the fixed clocks which
are the roots of the clock tree are not yet present, so reparenting
especially to one of the fixed clocks does not work. Move the
tree setup to a later initcall when the fixed clocks are there.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some clocks may only be modified when their parent clocks are enabled.
The kernel has the CLK_OPS_PARENT_ENABLE flag for this purpose.
Implement it for barebox aswell.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When reparenting a clock we have to make sure the new parent is enabled
when the clock was enabled on the old parent. Also we have to decrease
the old parents use counter when the clock was enabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most i.MX6SL infrastructure is already covered in barebox by general i.MX6
support. Missing infrastructure provided in separate commits are
* SoC type detection
* Clock infrastructure
Add the missing fsl,imx6sl-mmdc, so it will not be catched by fsl,imx6q-mmdc
and the remaining bits and pieces to provide barebox i.MX6SL SoC support.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Import i.MX6SL clock infrastructure from linux clk-imx6sl.c
To save space, clocks beeing unlikely usefull for bootloader purposes
(SSI, SPDIF, EXTERN_AUDIO) were not imported.
Further, the fixup code from linux mainline commits
a49e6c4b8204 ("ARM: imx: add common clock support for fixup mux")
cbe7fc8aaeef ("ARM: imx: add common clock support for fixup div")
was ignored for this commit.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add driver for DSPI - SPI IP core found on various Freescale/NXP
products (including Vybrid/VF610).
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the "Enhanced Host Controller Interface Specification for
Universal Serial Bus" after a USB port reset the EHCI Driver checks the
PortEnable bit in the PORTSC register. If set to a one, the connected device is
a high-speed device [...]. At the time the EHCI Driver receives the port reset
and enable request the LineStatus bits might indicate a low-speed device.
Additionally, when the port reset process is complete, the PortEnable field may
indicate that a full-speed device is attached. In either case the EHCI driver
sets the PortOwner bit in the PORTSC register to a one to release port
ownership to a companion host controller.
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The three MX31 PLL may be clocked from either CKIH or a frequency-multiplied
derivate of CKIL generated by the Frequency Pre Multiplier FPM.
Add the pll_ref_clk selection infrastructure and support for MCU PLL bypass
to support clock switching and boards not clocked CKIH.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
0x08 is the scan-code for 'backspace' not 'delete'.
0x17 indicates the start of an escape sequence, such as "[3~" for
'delete'.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is not yet a regulator driver, only the register map is
exported as /dev/pfuze* so the registers can be accessed for
debugging purposes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The watchdog can either reset only the SoC or assert the WDOG_B
output signal instead. On some boards it's necessary to use the
external WDOG_B output to make sure that external devices like the
PMIC are also properly resetted. This has been fixed in the Linux
driver which honours a fsl,ext-reset-output device tree property
to select between both ways. Do the same in the barebox driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX21 watchdog type the reset operation is really different
from the watchdog enable/set timeout operation, so create an
extra callback for this instead of folding both things together.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Testing for the write protection bit to determine if a card is write
protected or not is wrong. The bit may have the wrong value for
permanently plugged cards (eMMC) or for boards using a GPIO for
write protection detection.
Since the core will test for write protection before actually
calling into the driver this test can just be removed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
So far the eMMC boot partitions cannot be partitioned from the
device tree. Since they are often 4MiB in size they are big enough
to hold a barebox image and the environment. Add partition parsing
to the boot partitions to allow this usecase.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The binding states that a subnode containing partition subnodes
should have the name "partitions". Enforce this so that we do not
parse nodes with other names which may have partition descriptions
for other disks.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As stated in the FIXME comment this is needed. Get and
enable a "main_clk" just like the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX7 has two usbmisc devices, so we cannot use global instance
variables anymore. Create a driver private data struct for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ide_port is provided by the caller so it's not in the responsibility
of this function to free this memory in case of error.
Actually all callers do the free themselves, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Robin van der Gracht
Uwe Kleine-König
Alexander Kurz
Sascha Hauer
Wadim Egorov
Andrey Smirnov
Peter Mamonov
Michael Olbrich
Andrey Gusakov
Juergen Borleis