With multiple instances we returned -EBUSY which will provoke a
log message. Return successful instead since the i.MX27 has multiple
GPTs in the devicetree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With multiboard support the cpu_is_* macros are no longer compile time
generated and do not work in early code, so pass a v1 variable around.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to copy the initial binary portion from NFC SRAM to TEXT_BASE
and jumped there. With relocatable PBL TEXT_BASE becomes 0, so this
doesn't work. This is changed to copy the initial binary portion
to the beginning of SDRAM instead.
Tested on Phytec phyCARD-i.MX27 and Karo TX25 with and without
relocatable pbl.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The MPLL can be driven from the low frequency reference clock. This
is the reset default. Currently the clock code assumes this has been
changed from the lowlevel code. If that didn't happen we get wrong
clock rates. This adds the missing clocks so that we get correct
clock rates.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Solidrun has renamed the Carrier-1 to Hummingboard.
This is also the name that is used in upstream Linux,
change barebox to be in line with that.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only the 1GB variant is supported for now, as I don't
have anything other to test with.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
having DSR support in mci-core we need a way to
forward the DSR value to the driver. Add it to
platform data for imx-esdhc
TODO: implement the same for other host controller
drivers
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using the ANATOP_SI_REV register we can only distinguish between
i.MX6q/d and i.MX6dl/s SoCs. Take the number of cores into account
to get the exact SoC type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The IPU has a fractional pixelclock divider. When used, this produces
clock jitter which especially LVDS transceivers can't handle. Allow
to disable it via platform_data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With the IPU the way the display is connected is completely independent
of the framebuffer pixel format. So instead of specifying a pixel width
in platform_data we have to specify how the display is connected.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Before we jump to SDRAM where we just copied our code we have to
invalidate the instruction cache.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The image will be named after the official name of this board:
barebox-freescale-mx6-sabreline.img
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format.
No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A lot of files rely on include/driver.h including include/of.h (and
this including include/errno.h. include the files explicitly so we can
eventually get rid of including of.h from driver.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Convert to static inline functions and use lower case letters for function
names. Also, include mach/debug_ll.h when an architecture provides support
for debug_ll, not only when it's actually enabled. This allows architecures
to put some UART initialization code into mach/debug_ll.h which is compiled
out when debug_ll is disabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The esdctl devices are currently not in the devicetrees. this means
they are not registered when booting from the devicetree. Move the
device registration from soc_devices_init to soc_init which is called
even with devicetree support so that we get esdctl devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
gpiolib user have nothing to define in their machine
specific gpio.h, so do not include it.
The only thing they could define would be ARCH_NR_GPIOS,
but currently no architecture defines it. Should an architecure
feel the need to do it this would be a good opportunity to
get rid of this limitation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With multiboard support the compiletime generated BOARDINFO string
gets more and more meaningless. This removes it from Kconfig and
replaces it with a variable that can be set at boardlevel.
Also many boards have a standard setting for the hostname in the
environment. This patch also moves the standard to C code by calling
barebox_set_hostname().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to pass the DCD data from the boards. This patch allows
to optionally skip passing DCD data. In this case the DCD data
from the flash image is used if present.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the Phytec phyFLEX-i.MX6 board. The phyFLEX-i.MX6
is a system-on-module based on the Freescale i.MX6 SoC. This patch supports
the 1GiB and 2GiB variants on a PBA-B-01 baseboard.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX6 uses the same GPMI NAND controller as i.MX23/28 do. This adds
i.MX6 support to the driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ifdefs around the SoC specific boot_nand_external functions
can be removed when all functions go into their own sections so
that the linker can discard the unused functions.
This also adds a #ifdef BROKEN around the i.MX21 code which currently
does not have the imx21_barebox_entry function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of ifdeffing out the correct NFC base address just pass
it to imx_nand_load_image which is called from SoC specific
context anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All boards using the external nand boot code autodetect the
pagesize, so make this nonoptional to make the code simpler.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the GK802 'QUAD CORE Mini PC', which seems to be loosely
based on the Freescale i.MX6Q HDMI dongle reference design.
It is supposedly identical to the Hiapad Hi802.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This reverts commit 08c0e206b3.
The external NAND boot code currently uses the _text linker variable
to determine a place for the image. This doesn't work with multi image
support which will link the binary at 0x0. Revert multi image support
for the pcm038 for now until a solution is found.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In principle we could build barebox for multiple i.MX SoCs, so
select the correct SoC from the board selection.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This converts the Freescale i.MX53 loco aka qsb board to
multi image. The image will be named:
barebox-freescale-imx53-loco.img
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This also converts the Phytec phyCORE i.MX27 aka pcm038 to use
image compression. The image will be named
barebox-phytec-phycore-imx27.img
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the make infrastructure to build multiple SoC or
board specific images from a single barebox binary.
The basic idea is that we no longer have a single pbl, but instead
multiple pbls, one per image if necessary. Each pbl is defined
by its entry function so that each pbl can do exactly what a given
board needs. Additionally the pbls together with a self extracting
barebox binary can be encapsulated in specific image formats.
squashed in build fixes from Lucas Stach for make version >= 3.82:
Split Multimage Makefile rule in explicit and implicit parts
Fixes build with make version >=3.82
Frome the make 3.82 NEWS file:
* WARNING: Backward-incompatibility!
In previous versions of make it was acceptable to list one or more explicit
targets followed by one or more pattern targets in the same rule and it
worked "as expected". However, this was not documented as acceptable and if
you listed any explicit targets AFTER the pattern targets, the entire rule
would be mis-parsed. This release removes this ability completely: make
will generate an error message if you mix explicit and pattern targets in
the same rule.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Lucas Stach <dev@lynxeye.de>
This makes cpu_is_* functions when necessary for upcoming multisoc
support. When only one SoC type is compiled in cpu_is_* still expand
to static values.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This moves the CCM drivers to core_initcall since this has no dependencies.
This way we can be sure that the clock for the clocksource is available in
at postcore_initcall time.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The same value as used in Mainline and Freescale U-Boot. This might
increase the stability of i.MX51 boards. The 5:1 ratio we have in barebox
probably goes back to copy/paste from the i.MX53 code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imx_silicon_revision() can't be used from early init context, so
use imx51_silicon_revision() instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The IROM is located at physical address 0x0, so reading the
silicon revision from it leads to a NULL pointer dereference
if done too late when the MMU is already enabled. Use the IIM
instead which is also done in the Kernel. This limits the silicon
revisions to 2.0 and 3.0, but I assume the earlier versions are
not seen in the wild anyway.
This also moves the call to imx_set_silicon_revision() out of
imx51_silicon_revision() so that imx51_silicon_revision() can be called
in early init context.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes boot_mode detection for non-internal boot and
bootsource detection for i2c boot. Further, the bootsouce_instance
is now determined for spi, i2c, and mmc/sd boot.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is mainly a backport of the imx6_revision function of
arch/arm/mach-imx/mach-imx6q.c in the linux kernel sources.
Signed-off-by: S. Fricke <sfricke@data-modul.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use MMC_CAP_ names instead of MMC_MODE_. This makes it more
clear that these are capabilities of host/card and do not refer
to the current mode. These are in line with the Linux Kernel
except for MMC_CAP_MMC_HIGHSPEED_52MHZ which could be fixed
later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds several missing includes to files under include/ which
we relied on being included implicitly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds host tools for i.MX to generate the i.MX internal
flash header format and a tool to upload these images to an
i.MX SoC via USB.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a port of the official PLL errata workaround from Freescale.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.
This is based on U-Boot commit:
commit 9db1bfa110ac411ab3468e817f7f74b2439eb8c8
Author: David Jander <david@protonic.nl>
Date: Wed Jul 13 21:11:53 2011 +0000
ARM: MX51: PLL errata workaround
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Alexander Shiyan
Lucas Stach
Markus Niebel
Jesús Guitarte
Lucas Stach
Rostislav Lisovy
Philipp Zabel
Alexander Aring
Eric Bénard
Philipp Zabel
S. Fricke