The i.MX6 uses the same GPMI NAND controller as i.MX23/28 do. This adds
i.MX6 support to the driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ifdefs around the SoC specific boot_nand_external functions
can be removed when all functions go into their own sections so
that the linker can discard the unused functions.
This also adds a #ifdef BROKEN around the i.MX21 code which currently
does not have the imx21_barebox_entry function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of ifdeffing out the correct NFC base address just pass
it to imx_nand_load_image which is called from SoC specific
context anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All boards using the external nand boot code autodetect the
pagesize, so make this nonoptional to make the code simpler.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add support for the GK802 'QUAD CORE Mini PC', which seems to be loosely
based on the Freescale i.MX6Q HDMI dongle reference design.
It is supposedly identical to the Hiapad Hi802.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This reverts commit 08c0e206b3.
The external NAND boot code currently uses the _text linker variable
to determine a place for the image. This doesn't work with multi image
support which will link the binary at 0x0. Revert multi image support
for the pcm038 for now until a solution is found.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In principle we could build barebox for multiple i.MX SoCs, so
select the correct SoC from the board selection.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This converts the Freescale i.MX53 loco aka qsb board to
multi image. The image will be named:
barebox-freescale-imx53-loco.img
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This also converts the Phytec phyCORE i.MX27 aka pcm038 to use
image compression. The image will be named
barebox-phytec-phycore-imx27.img
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the make infrastructure to build multiple SoC or
board specific images from a single barebox binary.
The basic idea is that we no longer have a single pbl, but instead
multiple pbls, one per image if necessary. Each pbl is defined
by its entry function so that each pbl can do exactly what a given
board needs. Additionally the pbls together with a self extracting
barebox binary can be encapsulated in specific image formats.
squashed in build fixes from Lucas Stach for make version >= 3.82:
Split Multimage Makefile rule in explicit and implicit parts
Fixes build with make version >=3.82
Frome the make 3.82 NEWS file:
* WARNING: Backward-incompatibility!
In previous versions of make it was acceptable to list one or more explicit
targets followed by one or more pattern targets in the same rule and it
worked "as expected". However, this was not documented as acceptable and if
you listed any explicit targets AFTER the pattern targets, the entire rule
would be mis-parsed. This release removes this ability completely: make
will generate an error message if you mix explicit and pattern targets in
the same rule.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Lucas Stach <dev@lynxeye.de>
This makes cpu_is_* functions when necessary for upcoming multisoc
support. When only one SoC type is compiled in cpu_is_* still expand
to static values.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This moves the CCM drivers to core_initcall since this has no dependencies.
This way we can be sure that the clock for the clocksource is available in
at postcore_initcall time.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The same value as used in Mainline and Freescale U-Boot. This might
increase the stability of i.MX51 boards. The 5:1 ratio we have in barebox
probably goes back to copy/paste from the i.MX53 code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imx_silicon_revision() can't be used from early init context, so
use imx51_silicon_revision() instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The IROM is located at physical address 0x0, so reading the
silicon revision from it leads to a NULL pointer dereference
if done too late when the MMU is already enabled. Use the IIM
instead which is also done in the Kernel. This limits the silicon
revisions to 2.0 and 3.0, but I assume the earlier versions are
not seen in the wild anyway.
This also moves the call to imx_set_silicon_revision() out of
imx51_silicon_revision() so that imx51_silicon_revision() can be called
in early init context.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes boot_mode detection for non-internal boot and
bootsource detection for i2c boot. Further, the bootsouce_instance
is now determined for spi, i2c, and mmc/sd boot.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is mainly a backport of the imx6_revision function of
arch/arm/mach-imx/mach-imx6q.c in the linux kernel sources.
Signed-off-by: S. Fricke <sfricke@data-modul.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use MMC_CAP_ names instead of MMC_MODE_. This makes it more
clear that these are capabilities of host/card and do not refer
to the current mode. These are in line with the Linux Kernel
except for MMC_CAP_MMC_HIGHSPEED_52MHZ which could be fixed
later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds several missing includes to files under include/ which
we relied on being included implicitly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds host tools for i.MX to generate the i.MX internal
flash header format and a tool to upload these images to an
i.MX SoC via USB.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a port of the official PLL errata workaround from Freescale.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.
This is based on U-Boot commit:
commit 9db1bfa110ac411ab3468e817f7f74b2439eb8c8
Author: David Jander <david@protonic.nl>
Date: Wed Jul 13 21:11:53 2011 +0000
ARM: MX51: PLL errata workaround
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards setup more memory than they actually have. The real memory
size can then be detected later for example by reading a board id.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The prefix/cleanup series
ad09b59f8ba8c63596674c53af062b
missed a few unprefixed IOMUXC_BASE define users. Fix these.
Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fix incorrect Kconfig symbols for MACH_FREESCALE_MX51_PDK,
MACH_FREESCALE_MX53_LOCO and MACH_FREESCALE_MX53_SMD.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the iomux-v3 (found on i.MX25,35,51,53,6) to pinctrl
support. The old SoC specific API is kept for compatibility. The
pinctrl devicetree support is enabled automatically when OFDEVICE
support is available.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
clock_notifier_call_chain() can't be called before init time. Protecting
it with IS_ENABLED(__PBL__) is not enough. This patch splits out a new
imx53_init_lowlevel_early which can be called before init time and does
not have the call to clock_notifier_call_chain() in it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The value for i.MX53 216MHz is actually 432MHz. Use the same value
as for i.MX51 which really corresponds to 216MHz. These are the same
PLL216 values as U-Boot uses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX53 has the bootsource instance information stored
in SBMR[21:22], expose it to the environment.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch seperates the imx independent from the arch independent code. The
following functions and enums are renamed:
- imx_bootsource() -> bootsource_get()
- imx_set_bootsource() -> bootsource_set()
- enum imx_bootsource -> enum bootsource
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rename the barebox_loc environment variable to bootsource, since
- barebox_loc is a mixture between abbriviation and fulltext which is not nice
- technically it describes the source the SoC has booted from. This is not
necessarily barebox but could also be some other first stage loader.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On some i.MX SoCs the SDRAM controller has chipselect 2 enabled
by reset default. This confuses our SDRAM size detection. We
already have a fix for this in place. This patch adds the fix
for i.MX35 which needs it aswell. Also since we now detect the
SDRAM size in the SoC specific entry functions we have to apply
the fixup there, too.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch creates a seperate function for mx25 and mx35 to save it's
bootsource.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch renames imx_27_boot_save_loc() to imx27_boot_save_loc(), so that all
imx*_boot_save_loc() functions follow the same nameing sheme.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch removes some code leftover from:
a029e32 ARM i.MX: rework bootsource setting
which is now a no-op.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This function gives all functions a common, i.e. void, return value.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Enums are in the same way as defines, so write them in uppercase.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The external NAND boot code currently does not handle bad blocks
correctly on 2k NAND flashes. This patch adds a barebox_update
handler for external NAND boot which embeds a Bad block table in
the flashed image. The boot code will skip bad blocks found in
this bad block table then.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX external NAND boot code checks for a bad block every
page, which is wrong. Instead, check for a bad block at the
beginning of each block.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- switch to new environment
- make barebox partitions 512K big
- update defconfig for new env:
- enable menu support
- miitool support
- clk commands
- oftree support
- let/dirname/readlink commands
- enable external nand boot support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The reset value for the MAX clk gate is 0b10, that is it is turned
on in CPU run mode and off in stop mode. Configure it that way during
startup.
The 0b11 value previously in this field causes some nasty behaviour in
the Linux kernel:
- The i.MX35 has two bits per clock gate which are decoded as follows:
0b00 -> clock off
0b01 -> clock is on in run mode, off in wait/doze
0b10 -> clock is on in run/wait mode, off in doze
0b11 -> clock is always on
The MAX clock is needed by the SoC, yet unused in the Kernel, so the
common clock framework will disable it during late init time. It will
only disable clocks though which it detects as being on. This detection
is made depending on the lower bit of the gate. So with the value of
0b11 the clock framework will detect the clock as turned on, yet unused,
hence it will turn it off and the system locks up.
With the value of 0b10 instead, the clock framework will detect the
clock as being disabled and will not try to turn it off, so the
system works.
The real bug is in the Linux clock framework. However, the value 0f 0b10
seems to be a sane default value, so restore it. This lets Linux work
again and gives time to fix the bug in Linux.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We cannot jump to SDRAM unconditionally in imx*_barebox_boot_nand_external.
When we really boot from NOR flash the binary is not yet copied to SDRAM.
Instead, let the return value of imx_barebox_boot_nand_external() indicate
whether we really boot from NAND and only jump to SDRAM in this case.
Otherwise just continue to the normal SoC specific entry.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Only one of IIM, CCM or ESDCTL device is allowed, so use DEVICE_ID_SINGLE
for these devices.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PCM038 uses IIM in board code, so select IMX_IIM symbol by default.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides rename MFD-related symbols for using MFD-prefix.
Additionally, sorting mfd/Kconfig and mfd/Makefile records.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX21 has a imx1 gpio type. Change the name accordingly, otherwise
the gpio driver does not probe successfully.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX35 has a imx31 gpio type. Change the name accordingly, otherwise
the gpio driver does not probe successfully.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
reset is confusing with the cpu reset and impossible to grep
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Most i.MX boards can use the imx*_barebox_entry functions. The remaining
(i.MX21, i.MX6) use hardcoded base addresses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX will get SoC specific entry points for barebox. To find the
correct one we have to call these from the SoC specific
imx*_barebox_boot_nand_external functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Additionally to the generic entry point the i.MX specific ones
calculate the SDRAM size automatically so the boards do not have
to care.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Several i.MX boards setup a temporary stack in their lowlevel code.
Instead of using STACK_BASE use a stack in internal SRAM to get rid
of the STACK_BASE compile time dependency.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pattern for i.MX boards starting in external NAND boot mode is always
the same:
- Check if we are running in NFC address space, if not call
board_init_lowlevel_return()
- copy binary to link address
- execute relocated binary
- call imx_nand_load_image()
Add a common function for this to make the board code easier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows to register the USB ports for the chipidea driver. For
now the otg/h1 register functions also register the corresponding
USB phys.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
What we had as usb phy1 base address is really usb phy2. Fix the names
and add the missing base address definition for usb phy1.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The imx6_usb_phy1* functions are misnamed. It's usb phy2 that is configured
here, so rename the functions accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On the MX27 based board phycard-i.MX27 the display won't properly
come up.
Before removing imx-regs.h and the code that sets the register
in the i.MX video driver, the PCCR registers were set _after_
the screen start (LSSAR) was set.
This restores that old behaviour and makes the display come up
properly again.
I did not have a chance to test this on any other i.MX27 or i.MX21
hardware though I assume that the "old" order is required there
too.
Signed-off-by: Daniel Mierswa <d.mierswa@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also put those names solely in the .c file as it's done with
the i.MX27 code.
Signed-off-by: Daniel Mierswa <d.mierswa@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Efika MX Smartbook is a i.MX51 based netbook. This patch adds
nearly full support for it including:
- USB
- SD card slots
- Internal SPI NOR flash
- Internal flash PATA drive
- LEDs
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Register the USB misc devices and provide convenience wrappers to
register the USB ports for i.MX27.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX27/31 have the second chip select enabled by reset default.
This can be considered as a hardware bug, because even boards which
need this settings cannot work out of reset because of the missing
initialization sequence. Detect this reset default setting and disable
this chipselect then to be able to properly detect the SDRAM size.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format, removing
extraneous lines and spaces. No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Philipp Zabel
Markus Niebel
S. Fricke
Andreas Pretzsch
Alexander Shiyan
Marc Kleine-Budde
Jean-Christophe PLAGNIOL-VILLARD
Hubert Feurstein
George Pontis
Daniel Mierswa