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146 Commits

Author SHA1 Message Date
Sascha Hauer 638e059aba Merge branch 'for-next/arm-board-reset'
Conflicts:
	arch/arm/cpu/start-reset.c
	arch/arm/include/asm/barebox-arm.h
	arch/arm/mach-omap/Kconfig
	arch/arm/mach-omap/omap3_core.S
2012-10-03 21:19:30 +02:00
Sascha Hauer 6021818e3d Merge branch 'for-next/arm-remove-arch-init-ll'
Conflicts:
	arch/arm/include/asm/barebox-arm.h
2012-10-03 21:13:31 +02:00
Sascha Hauer d1e65d2a7b Merge branch 'for-next/remove-fsf-address'
Conflicts:
	drivers/net/miidev.c
	include/miidev.h
2012-10-03 21:12:48 +02:00
Sascha Hauer 4a543aa677 Merge branch 'for-next/arm' 2012-10-03 21:10:11 +02:00
Sascha Hauer c05511d6cd ARM: Disable MMU feature in PBL
remap_cache currently does not work, so enabling the MMU in the
PBL currently does not make sense. Disable it for now.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-03 16:10:04 +02:00
Jan Luebbe faf7b7af6e ARM: give boards control of the reset entry point
On some SoCs (for example AM35xx), the ROM bootloader passes useful
information in r0 when jumping to barebox.

To avoid overwriting this in the generic reset code, we introduce
common_reset as a C function and as an assembler macro. This is then
called form the reset entry point (either in common or in board code).

This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>.

Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-09-27 19:30:04 +02:00
Sascha Hauer cc1602604d ARM: remove ARCH_HAS_LOWLEVEL_INIT
This is unused now and not needed. We have a board_init_lowlevel. If a
board needs some architecture setup it can always call it from its
board_init_lowlevel.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-09-27 19:30:04 +02:00
Sascha Hauer fd5cd6084a ARM: remove ARCH_HAS_LOWLEVEL_INIT
This is unused now and not needed. We have a board_init_lowlevel. If a
board needs some architecture setup it can always call it from its
board_init_lowlevel.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-09-25 09:40:55 +02:00
Sascha Hauer 77322aa896 Treewide: remove address of the Free Software Foundation
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-09-17 10:57:41 +02:00
Sascha Hauer d24bb0538d ARM mmu: use xmemalign
So we do not silently fail.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-09-16 22:12:16 +02:00
Sascha Hauer 2e368eec07 ARM lowlevel: Use get_runtime_offset
The current approach to get the offset between link and runtime address
is fragile. It requires a big fat comment to put no code above it and it
requires an extra linker section. Instead use a small assembler function.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-09-09 18:25:49 +02:00
Sascha Hauer f680f893b4 ARM lowlevel: Update function documentation
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-09-09 11:42:18 +02:00
Sascha Hauer d5b6012ac1 create a common ARM flush_icache function
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-08-13 20:27:43 +02:00
Sascha Hauer bdb4093d3d ARM pbl: enable MMU during decompression
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-08-13 20:27:39 +02:00
Sascha Hauer a3a103c95c ARM MMU: call __mmu_cache_* as regular C functions
Now that __mmu_cache_* restore the registers they can be called
as regular C functions. Create a header file for them and use
C functions rather than inline assembly.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-08-13 20:27:38 +02:00
Sascha Hauer 8377958958 ARM __mmu_cache_*: Do not clobber registers
Save/restore the registers used in __mmu_cache_* so that they can
be called as regular C functions.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-08-13 20:27:38 +02:00
Jean-Christophe PLAGNIOL-VILLARD 104c39fe82 compressed image: add gzip support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-08-03 18:09:15 +08:00
Jean-Christophe PLAGNIOL-VILLARD 8d29296240 ARM: add early malloc support needed by the decompressor
This is not needed by lzo but by gunzip, xz and others.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-08-03 18:09:15 +08:00
Jean-Christophe PLAGNIOL-VILLARD 5c3db111da Add compressed image support
This allows for creating a lzo compressed binary unsing the pbl.

Only copy the piggydata if needed.

Add CONFIG_PBL_FORCE_PIGGYDATA_COPY option
In some case we need to copy the PIGGYDATA as the link address
as example we run from SRAM and shutdown the SDRAM/DDR for
reconfiguration but most of the time we just need to copy the
executable code.

based on Sascha Hauer
Add compressed image support

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-08-03 18:09:15 +08:00
Jean-Christophe PLAGNIOL-VILLARD 78867e2bbd Add pre-bootloader (pbl) image support
This allows for creating a pre-bootloader binary for
 - nand boot
 - mmc boot
 - compressed image

The pbl will be incharge of the lowlevel init if needed.
The barebox will skip it.

Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
implement a dummy panic.

For now on introduce dummy zbarebox* targets and c code that will contain later
the decompressor. This only implemeted on ARM.

This patch is based on Sascha Hauer <s.hauer@pengutronix.de>
Add compressed image support patch

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-08-03 18:09:13 +08:00
Sascha Hauer 91b632acbf ARM: move exception vector table to exceptions.S
start.c has nothing to do with the exception vector table anymore,
so move it next to the exception handling code in exceptions.S

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-24 08:21:26 +02:00
Sascha Hauer 7c3e50c83d ARM: Separate assembler functions into their own section
To let the linker remove unused functions.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-23 23:57:44 +02:00
Sascha Hauer a5dd9f8eca ARM startup: calculate offset instead of runtime address
Calculating the offset between runtime and linked address makes the
intention of the binary copy function a bit more clear.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-23 23:57:44 +02:00
Sascha Hauer 75821bdef5 ARM: Enable unaligned accesses on armv6 and later
We have the following in the tree:

|commit af42feb9d2
|Author: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
|Date:   Mon Jan 2 11:49:17 2012 +0100
|
|    ARM: set SCTRL[A] only when architecture does not support unaligned access
|
|    Recent gcc generates code with unaligned access when architecture
|    supports it. Setting A bit unconditionally causes data-aborts on such
|    code rendering barebox unusable.
|
|    Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
|    Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

What the patch tried is correct: We should set the A bit only when the architecture
does not support unaligned accesses. To figure out whether the architecture supports
unaligned accesses the patch tested for the U bit which is wrong. The U bit may be
0 after a reset, so instead of testing for the U bit we have to set it. This can
be done on armv6 and later. All others have the A bit set to trap unaligned accesses.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-10 19:07:15 +02:00
Sascha Hauer cca17e25bf ARM mmu: flush page tables in arm_mmu_remap_sdram()
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-07-03 20:07:03 +02:00
Sascha Hauer 008d2ba8bf Merge branch 'for-next/mmuinfo' 2012-07-02 11:02:52 +02:00
Jan Luebbe 490867bbc3 mmuinfo: add a command do display the result of virtual to physical translation
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-06-30 22:06:21 +02:00
Marc Kleine-Budde 76df95bde1 ARM mmu: don't use CONFIG_MMU to disable mmu code, there are static inline versions
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-06-30 12:46:24 +02:00
Sascha Hauer f6c6b1503c Merge branch 'pu/cache' into next 2012-05-24 10:24:22 +02:00
Sascha Hauer 023e9f01c7 ARM startup: Do call __mmu_cache_flush during startup
Traditionally we call __mmu_cache_flush in early startup. There
is a problem with armv7 and hierarchical caches though, on these
systems __mmu_cache_flush uses the stack. Appearantly this was
seldomly a problem, because most of these systems have a ROM
bootloader which sets up some stack, but on a special i.MX6 system
this failed badly. We should not have to flush caches here. Every
sane system should pass control to the bootloader without stale
entries in the caches *), so it should be a safe assumption that the
cache flush can be removed.

Since __mmu_cache_flush is not called from early code anymore we can
also move it to the regular text section.

Be brave and give it a try.

*) omap3 seems to be a exception to this, but this has a cache flush
in arch_init_lowlevel already

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-23 22:28:11 +02:00
Antony Pavlov f9b932fed9 fix typo funtion -> function
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-13 22:00:54 +02:00
Jean-Christophe PLAGNIOL-VILLARD 8e6f45f54f complete: add empty complete support
for cpuinfo, clear, dhcp, false, login, lsmod, meminfo, passwd, pwd, reginfo,
reset, true, usb, version

for mach-imx and mach-mxs: dump_clocks
for u_serial: mycdev

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-04-30 20:37:40 +08:00
Sascha Hauer 2c2f657092 ARM startup: invalidate I-cache before jumping to relocated binary
barebox can startup with I-cache enabled, so to be on the safe
side we should invalidate the I-cache before jumping to a binary
we just copied in place.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-04-13 17:34:52 +02:00
Sascha Hauer beb36c510b Merge branch 'work/thumb2' into next 2012-03-06 09:39:59 +01:00
Sascha Hauer 276252a559 ARM: use unconditional branch in exception vectors
If we want to trap the processer in the exception vectors
we have to use unconditional branch instructions. I don't
know what I thought when using bne :-/

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-03-06 09:38:41 +01:00
Sascha Hauer 104a6a7ccf ARM: Allow to compile in thumb-2 mode
This shrinks the resulting binary size by ~25%. Exceptions
are still handled in arm mode, so we have to explicitely
put .arm directives into the exception code. Thumb-2 mode
has been tested on i.MX51 Babbage board.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-03-06 09:37:59 +01:00
Sascha Hauer cb1bd905dc ARM: get runtime offset of board_init_lowlevel_return by using separate section
We used to get the runtime offset of the board_init_lowlevel_return
by doing a &board_init_lowlevel_return. This does not work in thumb-2
mode, so use a separate linker section for this function instead.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-02-28 09:55:04 +01:00
Sascha Hauer 2c2d00a281 ARM: move exception vectors away from start of binary
Traditionally U-Boot and barebox have the exception vectors at
the start of the binary. There is no real reason in doing so,
because in the majority of cases this data will not be at 0x0
where it could be used as vectors directly anyway.
This patch puts the vectors into a separate linker section and
defines an head function which is placed at the start of the
image instead. Putting this in a separate function also has
the advantage that it can be placed at the start of images
which require an additional header like several Freescale i.MX
images. As the head function contains the barebox arm magic
those images can now also be detected as barebox images.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-02-28 09:55:02 +01:00
Sascha Hauer 33d1cc4bf2 commands: remove struct command pointer from commands
This is unused in all commands and thus can be removed.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-02-27 20:28:07 +01:00
Sascha Hauer c1e62ef1b7 ARM: Add missing ifdef around dump_stack()
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-27 12:18:08 +01:00
Sascha Hauer 192d6fe9be Merge branch 'pu/debug' into next 2012-01-27 09:31:13 +01:00
Sascha Hauer 79c2f03aee Add dump_stack function
At least ARM allows us to dump the stack, but we currently
have no prototype for this. Add a dump_stack prototype and
provide a static inline function for architectures without
stack dump support. Also, call dump_stack() in panic() to
provide more information in the case of a panic.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-26 14:12:08 +01:00
Sascha Hauer 0073723f15 ARM cache-armv7: Add additional ISB
At least OMAP3 needs this to properly work with MMU.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-17 18:50:55 +01:00
Sascha Hauer 0d22025084 Merge branch 'next' 2012-01-05 10:25:17 +01:00
Sascha Hauer e9557be0c1 ARM cache-armv7: use thumb-2 instructions where necessary
Copied from the Kernel

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-02 15:00:28 +01:00
Enrico Scholz af42feb9d2 ARM: set SCTRL[A] only when architecture does not support unaligned access
Recent gcc generates code with unaligned access when architecture
supports it. Setting A bit unconditionally causes data-aborts on such
code rendering barebox unusable.

Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-02 13:07:08 +01:00
Enrico Scholz b936cd4d68 ARM: mark 'lr' as clobbered by inline assembler
When executing 'bl' in inline assembler, the 'lr' register must be
marked as clobbered too.

Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-01-02 13:07:08 +01:00
Robert Jarzmik 0a9083d929 arch/arm: mmu: add map_io_range()
Add a function to remap an IO range into a virtual addresses
range. This is particulary usefull for the few devices
mapped at physical address 0, as the MTD boot devices.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-12-21 11:15:31 +01:00
Sascha Hauer c95f81b36a ARM: remove unused icache command
The icache command is unused. Instead of adding it to compilation
again, remove it as the cpuinfo command provides the same information.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-12-15 11:46:50 +01:00
Sascha Hauer ccc25627e5 ARM cpuinfo: decode more bits, use ARRAY_SIZE
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-12-15 11:46:50 +01:00