The core support was brought by Marc and Sascha.
The cache choice was fixed by Luotao Fu.
Some gpio and devices addons were provided by Robert.
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We never had interrupt support in barebox and we have no plans to
add interrupt support. Even if we do I doubt the current fragments
of irq support are helpful, so remove them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rename create_section into create_sections, as the function
is used to create multiple sections, and in particular it
creates the 4096 sections of 1MBytes to have a 1:1 flat
mapping of the 4GBytes address space.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
By doing this we can remove the ptes field in struct arm_memory
which won't be present in a generic memory bank structure anymore.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Don't call panic with "resetting CPU...". Depending on the
configuration the system might also hang.
- panic does not return, so no need to call reset_cpu afterwards
- bundle show_regs and panic into a seperate functions to not have
to call both functions from each exception handler
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The exception vector at 0x14 is not used on arm, so no need
to bind this address to a exception handler. Remove the
corresponding code
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In barebox we used 1MiB sections to map our SDRAM cachable. This
has the drawback that we have to map our sdram twice: cached for
normal sdram and uncached for DMA operations. As address space gets
sparse on newer systems we are sometines unable to find a suitably
big enough area for the dma coherent space.
This patch changes the MMU code to use second level page tables.
With it we can implement dma_alloc_coherent as normal malloc, we
just have to remap the allocated area uncached afterwards and map
it cached again after free().
This makes arm_create_section(), setup_dma_coherent() and mmu_enable()
noops.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We want to use the memory banks later in the MMU which is
independent of Linux, so move this to a location which is
always compiled.
Also, make the memory bank list global and add an iterator
for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is useful to detect a barebox image and to be able
to copy only the image size if barebox is stored on
raw partitions which are bigger than the image.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On several boards without MMU support the vectors cannot be mapped
to 0x0 and exception support is nonfunctional anyway, so make this
configurable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Often enough the exception vectors are not on TEXT_BASE (for example
on i.MX SoCs in internal boot mode), so the board specific code did
not map the exception vectors to 0x0 but whatever happens to be on
TEXT_BASE. Also, the current section-only mapping requires the
exception vectors to be on a 1MB boundary.
Instead, create the possibility to create second level tables and
use this to map a copy of the exception vectors in a board
independent way.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The armv7 specific __mmu_cache_on function accidently sets
the page table pointer with the unitialized value of r3. It seems
that often enough r3 still held the correct value from a previous
call to mmu_init allowing this bug to remain uncovered for longer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The idea is to panic() when there is no memory available for normal
operation. Exception: code which can consume arbitrary amount of RAM
(example: files allocated in ramfs) must report error instead of panic().
This patch also fixes code which didn't check for NULL from malloc() etc.
Usage: malloc(), memalign() return NULL when out of RAM.
xmalloc(), xmemalign() always return non-NULL or panic().
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
and make init.h availlable for assembly too
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The way it was done before does not work on Cortex processors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Orjan Friberg <of@flatfrog.com>
Tested-by: Luca Ceresoli <list@lucaceresoli.net>
Lets translate the startup code to a language we all understand better.
Tested on pcm038 (arm v5) and pcm043 (arm v6).
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of having seperate cache flush functions in the startup code
we want to call the generic functions. To accomplish this they have
to be in the bare_init section.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These cache functions have been extracted from
arch/arm/boot/compressed/head.S. The old code only worked
properly on ARMv4. Tested on ARMv4, ARMv5, ARMv6 hardware.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Nishanth Menon wrote:
> no signed off by and no diffstat?
Ups.
> can you use git-format-patch to send please? it is easier to review.
Sure. Here it comes:
jbe
------8<---------8<---------8<---------8<---------8<---------8<----
Subject: [PATCH] Some doxygen related fixes:
- fix a few doxygen comments that are used in a wrong way
- move some pages and their content to a better place in the
generated documentation
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
No need to check for maximum argument counts. The commands are
safe to be called with more arguments, so lets safe some bytes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When checking if we have to relocate ourselves, use _stext instead
of TEXT_BASE. TEXT_BASE might be the location of a pre image header.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some devices, especially the ones doing DMA should be disabled before
giving control to an OS. We take the simple approach here: Just shutdown
the devices in the reverse order they were activated.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[Patch 10/17] U-Boot-V2:ARM:OMAP3: Add support for OMAP and Cortex A8
This patch adds support for OMAP3 platforms. Mainly to setup the infrastructure.
ARMV7 requires a different I/D cache cleanup code which is introduced in this patch
Signed-off-by: Nishanth Menon<x0nishan@ti.com>
Memory layout can now be specified via kconfig options. Two
possibilities exist: default layout means the layout is stack
/ malloc heap / U-Boot. The user can also specify fixed addresses
for each TEXT_BASE / stack / malloc heap.
as we rather use positive logic. Make it dependent on boards that
have it rather than on ARM
Signed-off-by: Nishanth Menon <x0nishan@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fixes the following warnings:
arch/arm/cpu/cpu.c:176:4: warning: no newline at end of file
commands/bootm.c:872:4: warning: no newline at end of file
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Put the reset vector at the beginning of the binary by creating
its own section in the linker script rather than specifying the
file.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Marc Kleine-Budde
Sascha Hauer
Robert Jarzmik
Antony Pavlov
Krzysztof Halasa
Jean-Christophe PLAGNIOL-VILLARD
Juergen Beisert
Nishanth Menon
Robert Schwebel
Juergen Beisert
Juergen Beisert
sascha
Sascha Hauer