I assume I am the only person knowing that barebox is able to
merge devicetrees. This feature seems broken for a while now since
trying to merge devicetress results in:
unflatten: too many end nodes
Remove this feature to save the complexity.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* this compile option actually turns on a command, so name it
accordingly
* also move the Kconfig definition into commands/Kconfig, thus
placing getopt into the "Network commands" section
* while at it, improve Kconfig documention
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* this compile option actually turns on a command, so name it
accordingly
* also move the Kconfig definition into commands/Kconfig, thus
placing getopt into the "Network commands" section
* while at it, improve Kconfig documention
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* this compile option actually turns on a command, so name it
accordingly
* also move the Kconfig definition into commands/Kconfig, thus
placing getopt into the "Shell scripting commands" section
* while at it, improve Kconfig documention
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch does probably too much, but it's hard (and very
cumbersome/time consuming) to break it out. What is does is this:
* each command has one short description, e.g. "list MUX configuration"
* made sure the short descriptions start lowercase
* each command has one usage. That string contains just the
options, e.g. "[-npn]". It's not part of the long help text.
* that is, it doesn't say "[OPTIONS]" anymore, every usable option
is listed by character in this (short) option string (the long
description is in the long help text, as before)
* help texts have been reworked, to make them
- sometimes smaller
- sometimes describe the options better
- more often present themselves in a nicer format
* all long help texts are now created with BUSYBOX_CMD_HELP_
macros, no more 'static const __maybe_unused char cmd_foobar_help[]'
* made sure the long help texts starts uppercase
* because cmdtp->name and cmdtp->opts together provide the new usage,
all "Usage: foobar" texts have been removed from the long help texts
* BUSYBOX_CMD_HELP_TEXT() provides the trailing newline by itself, this
is nicer in the source code
* BUSYBOX_CMD_HELP_OPT() provides the trailing newline by itself
* made sure no line gets longer than 77 characters
* delibertely renamed cmdtp->usage, so that we can get compile-time
errors (e.g. in out-of-tree modules that use register_command()
* the 'help' command can now always emit the usage, even without
compiled long help texts
* 'help -v' gives a list of commands with their short description, this
is similar like the old "help" command before my patchset
* 'help -a' gives out help of all commands
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old output of "help" was just producing a long list, that usually
scrolled of the screen (even on a X11 terminal). This list is more
compact, and also sorted by groups.
The old output format (plus grouping) is now available with 'help -v'.
Example:
Information commands:
?, devinfo, help, iomem, meminfo, version
Boot commands:
boot, bootm, go, loadb, loads, loadx, loady, saves, uimage
...
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
barebox used to have its own include/dt-bindings with files copied
from the corresponding kernel files. Use upstream dt-bindings directly
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current implementation fakes a memory-mapped I/O device
at 0x3f8 and 0x2f8, then uses platform read/write functions
to do the actual reading and writing. These platform functions
only exist for the x86 platform; better to move the I/O
routines into the driver and have the driver request I/O ports
using request_ioport_region.
Signed-off-by: Michel Stam <michel@reverze.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Rework the current framework so that I/O mapped I/O resources are
also possible.
Signed-off-by: Michel Stam <michel@reverze.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds CBUS UART dts support;
also it adds the necessary macros for DEBUG_LL.
qemu-malta supports three serial interfaces:
* two ports are provided by the FDC37M817
Super I/O; this chip is connected via LPC bus
to Intel 82371EB (PIIX4E) South Bridge;
* the third serial port is provided by
the discrete TI 16C550C (CBUS UART);
this chip is connected via CBUS directly
to the board's GT64120 North Bridge.
See Malta User's Manual (MD00048) for details.
CBUS UART Instructions for use:
1. Enable CONFIG_CONSOLE_ACTIVATE_ALL in .config
(or disable uart0 in dts) and compile barebox;
2. run qemu:
qemu-system-mips -nographic -nodefaults \
-monitor null -M malta -m 256 \
-serial null -serial null -serial stdio \
-bios barebox-flash-image
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This board support code can be used for TP-LINK WR703 too.
TP-LINK WR703 is very similar to TP-LINK MR3020, there are
some non-essential differences:
* WR703 is smaller and cheaper;
* WR703 has only one led, but MR3020 has five leds;
* MR3020 uses mini-USB connector, WR703 uses micro-USB connector.
See https://forum.openwrt.org/viewtopic.php?id=45159 for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use the mach-ath79 name for compatibility with linux kernel.
Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is based on
commit fa1a406f72
Author: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Date: Sat Nov 9 14:24:18 2013 +0100
ARM: lib: add BAREBOX_CLK_TABLE to linker script
This adds an .oftables section right before .dtb section with
BAREBOX_CLK_TABLE to ARM linker script.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Here is my error log:
CC common/startup.o
In file included from arch/mips/mach-xburst/include/mach/debug_ll.h:25,
from include/debug_ll.h:31,
from common/startup.c:36:
arch/mips/include/asm/debug_ll_ns16550.h: In function 'PUTC_LL':
arch/mips/include/asm/debug_ll_ns16550.h:62: error: 'DEBUG_LL_UART_ADDR' undeclared (first use in this function)
arch/mips/include/asm/debug_ll_ns16550.h:62: error: (Each undeclared identifier is reported only once
arch/mips/include/asm/debug_ll_ns16550.h:62: error: for each function it appears in.)
make[1]: *** [common/startup.o] Error 1
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All MIPS board use <vendor>-<model> name template save Ritmix RZX-50.
This commit fixes this inconsistency.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We use dts for serial port initialization,
so we have no need in mach-xburst/serial.c anymore.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is based on this linux commit:
commit 2fa36399e63c911134f28b6878aada9b395c4209
Author: Kelvin Cheung <keguang.zhang@gmail.com>
Date: Wed Jun 20 20:05:32 2012 +0100
MIPS: Add CPU support for Loongson1B
Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology
(ICT) and the Chinese Academy of Sciences (CAS), which implements the
MIPS32 release 2 instruction set.
[ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device
which also is why it identifies itself with the Legacy Vendor ID in the
PrID register. When applying the patch I shoveled some code around to
keep things in alphabetical order and avoid forward declarations.]
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Loongson (simplified Chinese: 龙芯; pinyin: Lóngxīn; literally: "Dragon Core")
is a family of general-purpose MIPS CPUs developed at the Institute of Computing
Technology (ICT), Chinese Academy of Sciences (CAS) in the People's Republic of China.
See http://en.wikipedia.org/wiki/Loongson for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
without "#ifndef __ASSEMBLY__ #endif", an assembly file
including this file will break compilation.
Signed-off-by: Du Huanpeng <u74147@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
GXemul is another MIPS emulator with Malta board support.
As opposed to qemu GXemul supports only fixed GT64120
YAMON-compatible PCI mapping.
As now barebox uses YAMON-style mapping we can
use GXemul for barebox run.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are some reasons for using YAMON-style memory map:
* we can run Linux kernel from barebox;
* we can use GXemul for running barebox.
YAMON-style GT64120 memory map make move UART to the new position.
The files gt64120.h and mach-gt64120.h are imported from Linux.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On MIPS Technologies boards 0x1fc00010 address
is reserved for BoardID. The hardware or emulator
intercepts accesses to this address and we can't use
this address for storing code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On 8 February 2013 MIPS Technologies was acquired
by Imagination Technologies. Now the http://www.mips.com/ site
is redirected to http://www.imgtec.com/, the Malta development
board page is unreachable.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
arch/mips/mach-bcm47xx/include/mach/debug_ll.h: In function 'PUTC_LL':
arch/mips/mach-bcm47xx/include/mach/debug_ll.h:33: warning: passing argument 1 of '__raw_readb' makes pointer from integer without a cast
arch/mips/mach-bcm47xx/include/mach/debug_ll.h:34: warning: passing argument 2 of '__raw_writeb' makes pointer from integer without a cast
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Convert to static inline functions and use lower case letters for function
names. Also, include mach/debug_ll.h when an architecture provides support
for debug_ll, not only when it's actually enabled. This allows architecures
to put some UART initialization code into mach/debug_ll.h which is compiled
out when debug_ll is disabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With multiboard support the compiletime generated BOARDINFO string
gets more and more meaningless. This removes it from Kconfig and
replaces it with a variable that can be set at boardlevel.
Also many boards have a standard setting for the hostname in the
environment. This patch also moves the standard to C code by calling
barebox_set_hostname().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
nmon is a tiny monitor (<1200 bytes) program
for the MIPS processors.
It can operate with NO working RAM at all!
It uses only the processor registers and NS16550-compatible
UART port for operation, so it can be used for a memory
controller setup code debugging.
With no changes nmon should work on different MIPS
processors as it uses only common MIPS-I instructions.
nmon is inspired by mmon, MIPS VR4300 Mini-monitor.
mmon is copyrighted 1996, 2003 by Eric Smith.
Also Alexander Voropay must be noted for his work
on qemu & YAMON mmon adaptations made in 2006 and 2007.
See http://www.brouhaha.com/~eric/software/mmon/
for mmon details.
The mmon's features missed in nmon:
* batch memory dumps;
* byte and 16-bit half-words dumps and stores;
* fill memory;
* load S-records (this function make sense only
if RAM works properly).
nmon has only 4 commands:
q - quit to barebox
d <addr> - read 32-bit word from <addr> address
w <addr> <val> - write 32-bit word <val> to <addr>
g <addr> - jump to <addr>
Addresses and data must be given in hexadecimal.
Everything (including hex digits 'a'..'f') must
be in lower case.
EXAMPLE: change value of word with address 0xa0000000
nmon> d a0000000
00000000
nmon> w a0000000 12345678
nmon> d a0000000
12345678
nmon>
There is no error checking of any kind. If you
give an invalid address you will probably get
an exception which will hang the board and you
will have to press the reset button.
You can interrupt current command (e.g. you have
made error in input <addr> value) by pressing
the <ESC> key.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
if E0 flag is not set, sdram is defenetly not configured.
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mips_barebox_10h macro inserts at offset 0x10
of the barebox image the string 'barebox ' followed
by compile time version mark.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Remove Shinya Kuribayashi's copyright on the ADR macro
in start-pbl.S as we don't define this macro in
this file or even use it where.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The generated label usage make possible
to use the ADR macro many times.
If we don't use a generated label and we try
to use the ADR macro second time then we get
Error: symbol `_pc' is already defined
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have the LONGSIZE macro definition in <asm/asm.h>.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
By default CONFIG_JZ4750D_DEBUG_LL_UART0 is selected.
This can confuse the Ritmix RZX50 user as the board
has only UART1 connected.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit moves the C debug_ll code from
the MIPS <debug_ll_ns16550.h> header file to
the MIPS <asm/debug_ll_ns16550.h> header file,
so the C code and the asm code can use the same
register address macros.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Set fake DEBUG_LL_UART_DIVISOR to use <asm/debug_ll_ns16550.h>.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Set DEBUG_LL_UART_DIVISOR to use <asm/debug_ll_ns16550.h>.
The JZ4755 uses 24 MHz as the main reference frequency (EXCLK).
The UART controller can work on full EXCLK or on EXCLK/2.
Just now we use EXCLK/2 legacy clock setup made by U-Boot.
So set UART controller base frequency to 12 MHz.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds macros for ns16550 port initialisation
and single char output. The macros can be used in
MIPS asm pbl code.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Ingenic JZ4755 SoC (JZ4750D family) has three UARTs.
So we can give to the user choose which one of them
to use for low level debug (debug_ll) output.
Also this commit adapts the only JZ4755 board
(Ritmix RZX50) for using the new debug_ll port
selection.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In barebox we have no CONFIG_MIPS_MT_SMTC Kconfig option.
So remove the code under this macro.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also enable the iomem and poweroff commands.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Ingenic JZ4740, JZ4755 and JZ4770 SoCs use
the same IP core for UART interface. This IP core
is NS16550-compatible, but it needs small workaround.
This commit moves the UART code for Ingenic SoCs
from board level to machine level. So the code
can be reused for different boards or even
different SoCs.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On MIPS there are two segments in CPU address space that
can be used for untranslated memory access: KSEG0 and KSEG1.
KSEG0 is used for cached access and KSEG1 is used for
uncached one.
The instroduced mips_add_ram0() function registers two
address regions for memory access: one in KSEG0 and
the other one in KSEG1.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add barebox-data section in arm branch to get complete
barebox regions in sdram regions tree.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Change function remap_range in arm architecture to make it
global accessable. For example command 'memtest' can change
pte flags to enable or disable cache.
Add dummy function for others architectures that doesn't
have mmu or pte support.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Trivial pbl support has no cpu specific setup.
We will add cache setup routines in the future.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch is based on ARM pbl support and allows
creating a pre-bootloader binary for compressed image.
For different MIPS SoCs (or even for different boards based
on the same SoC) the operations carried on in start-pbl.S
can be very different. The additional constraints can be imposed
on the size of the boot code or the special magic labels in
the beginning of the boot code; In some cases it could be
necessary to show CPU is alive as early as possible
(transmit a char via UART or blink a LED).
So the demands for pbl start operation can be very different.
E.g. malta board store boot code at the NOR flash mapped
to the MIPS power-on address (0xbfc00000); it is the most
simple case: we need just copy pbl image from direct-mapped
flash to RAM and jump there.
The XBurst-powered boards store boot code in the beginning
of a NAND flash or in the beginning of SD/MMC card.
In this case we must use simple and short NAND or SD/MMC access
routines to copy pbl image to RAM.
To meet so different demands a simple technique is selected:
* MIPS pbl entry point located in file arch/mips/boot/start-pbl.S.
* MIPS pbl code (see start-pbl.S) assumes that every pbl-enabled
board has a arch/mips/boards/<BOARD>/include/board/board_pbl_start.h
header file. This file must contain definition of
the board_pbl_start macro. This macro is used as start of pbl image;
* the most popular asm routines (stack setup, relocation to link
address, NS16550 initialization (WIP) and so on) are containt
in the arch/mips/include/asm/pbl_macros.h header file.
So board pbl macro can use it if necessary.
It is possible to create similar headers with macros for each
specific SoC; so even if we have many different boards based
on the same SoC the board_pbl_start macro for every board
can be short and clear.
* after board-specific initialization the stack pointer
is initialized and pbl C code is started.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch provides a global cleanup barebox Kconfig files. This includes
replacing spaces to tabs, formatting in accordance format, removing
extraneous lines and spaces. No functional changes.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
putc already is a regular barebox function. To avoid conflicts and
confusions just let architectures define PUTC_LL directly instead
of going through this addiotional redirection.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The commit
commit d25d94bea6
Author: Antony Pavlov <antonynpavlov@gmail.com>
Date: Fri Jun 1 13:23:20 2012 +0400
MIPS: make possible board-specific header files
This patch makes possible to put a board-specific
header file (e. g. foobar.h) to arch/mips/boards/*/include/board/.
breaks the out-of-tree build for the boards that use it (rzx50).
Reported-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mips currently uses local_irq_save and local_irq_restore
which are not defined. Drop them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Antony Pavlov <antonynpavlov@gmail.com>
Depending on the SoC a barebox.bin, barebox.netx, barebox.s5p, MLO image
is generated. With pbl support there now is an additional
arch/arm/pbl/zbarebox.bin image.
To help the user to determine which image should be flashed to his device,
generate a barebox-flash-image link.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Some drivers call dma_inv_range() on buffers, on arm these buffers must
be cache line aligned. This patch introduces a generic dma_alloc,
dma_free. Archs can implement in their own functions in "asm/dma.h" and add a:
#define dma_alloc dma_alloc
#define dma_free dma_free
On all other archs the generic versions, which translate into xmalloc
and free are used.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The 40 KHz frequency value was used to parry
__lshrdi3() error on little-endian MIPS because
the __lshrdi3() function is used in clocksource code.
The true value of the JZ4755's external clock frequency is 24 MHz.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the commit 40492a0c13
(MIPS: add common header file for DEBUG_LL via NS16550)
introduced common DEBUG_LL via NS16550 for MIPS
(see file arch/mips/include/debug_ll_ns16550.h).
In the commit 1cbe2b2c00
(MIPS: XBurst: add Ritmix RZX-50 board support)
the file debug_ll_ns16550.h used in
the file arch/mips/mach-xburst/include/mach/debug_ll.h.
Usage looks like this:
------------------------------------------------
+#ifdef CONFIG_BOARD_RZX50
+#include <mach/debug_ll_jz4755.h>
+#endif
+
+#include <debug_ll_ns16550.h>
------------------------------------------------
So after adding another board (e.g. A320) we will have something like this:
------------------------------------------------
#ifdef CONFIG_BOARD_RZX50
#include <mach/debug_ll_jz4755.h>
#endif
+#ifdef CONFIG_BOARD_A320
+#include <mach/debug_ll_jz4740.h>
+#endif
#include <debug_ll_ns16550.h>
------------------------------------------------
This approach has disadvantage:
* the files mach/debug_ll_jz4740.h and mach/debug_ll_jz4755.h
(they go to arch/mips/arch-xburst) are __BOARD-SPECIFIC__
(not SOC- or mach-specific!); The file mach-xburst/include/mach/debug_ll.h
is outside board directory, but it contains some board related information.
This commit introduce a more suitable solution.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch makes possible to put a board-specific
header file (e. g. foobar.h) to arch/mips/boards/*/include/board/.
Header file usage:
#include <board/foobar.h>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as the garbage collector will remove the empty function and the
add_ns16550_device is a empty inline if the driver is not enabled.
This will simplify add device adding.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fixes:
arch/mips/lib/lshrdi3.c:6: warning: no previous prototype for '__lshrdi3'
arch/mips/lib/ashrdi3.c:6: warning: no previous prototype for '__ashrdi3'
arch/mips/lib/ashldi3.c:6: warning: no previous prototype for '__ashldi3'
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this allow to check we do not exceed the size of the SRAM as example
introduce BAREBOX_MAX_BARE_INIT_SIZE the maximum size of bare_init
this will allow your bare_init will fit in SRAM as example
ARCH can overwrite it via ARCH_BAREBOX_MAX_BARE_INIT_SIZE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The only supported peripheral is ns16550 serial port.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The machine uses only big-endian mode.
Only supported peripheral is serial port.
The machine supports only MIPS32 CPUs.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Antony Pavlov
Holger Schurig
Michel Stam
Du Huanpeng
Antony Pavlov
Alexander Shiyan
Dmitry Smagin
Jean-Christophe PLAGNIOL-VILLARD
Oleksij Rempel
Alexander Aring
Marc Kleine-Budde