Added support for CompactFlash cards for PCM970 development board via
PCMCIA window.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch reflects real naming of SPI by Freescale.
We have two ECSPI channels and one CSPI.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also definition can be modified in arch/arm/boards/pcm043/lowlevel.c,
but I am not sure is we can call imx_silicon_revision() from
board_init_lowlevel().
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This means using an uint64_t instead of a struct pad_desc which allows
us to change pad settings using logic operations. Also with this we
can more easily keep the iomux tables in sync with the kernel.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
7ab0a0a i.MX27: Added helper for setup chipselect control register
added an helper which triggers the following error :
arch/arm/mach-imx/include/mach/imx27-regs.h:243: Error: bad instruction `static inline void imx27_setup_weimcs(size_t cs,unsigned upper,unsigned lower,unsigned addional)'
This patch fix this problem.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The image sizes have been hardcoded to 256K. This is inefficient
for smaller images and nonfunctional for bigger images. Calculate
the image size during compile time and use it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imx27_add_mmc0 really registered SDHC2. Fix this by adding a
imx27_add_mmc1 and use this in the pca100 board file. Also add
imx27_add_mmc2 helper for register SDHC3.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this allows I2C to work on boards which don't have external pull up
(like LOCO board)
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some variants of the i.MX53 do not allow to run at 1GHz, so
pass a cpu frequency parameter to the lowlevel init function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Whether the controller works in 8bit mode is not only dependent
on the controller but also on the board having wired up 8 data
lines, so put a capabilities field in platform data.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adding overlay support for i.MX3 sdc.
Foreground channel only works when background is also enabled.
The foreground video mode is always the same as the background.
Also added alpha command to set the alpha value of the foreground.
Tested on a phyCORE-i.MX35.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make support of multiple video modes possible for i.MX3 boards.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reimplement the code from lowlevel.S in C. It is run
from SDRAM anyway, so we can safely do this initialization
in a regular barebox environment instead in Assembly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- move code which can be shared between i.MX53 and i.MX51
to a common file
- rename mx53_init_lowlevel to imx53_init_lowlevel
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add all available video modes to the framebuffer. devinfo fb0
shows the available modes. We can select a mode now.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
without this, the pins seems to be opendrain and thus the LCD signals
are not properly driven leading to wrong colors on the screen.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We switched to resources recently and the nand controller
of the i.MX53 needs two of them, so fix the helper in the
same way as the i.MX51
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds lowlevel (AIPS, PLL, L2) initialization for i.MX53 boards.
This is a direct transcription of Freescales U-Boot assembler code
with the exception that we initialize PLL1 with 1000MHz and assume
that all necessary voltages are already adjusted when we arrive here.
It must be explicitely called from the boards so a board is free to
do it's own initialization. However, boards should use this code
and make it more configurable if necessary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The nand controller on i.MX51/53 uses two base addresses. Instead
of hardcode the second address use the new shiny resources two specify
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on the Linux driver. Tested with m25p80 with CS in GPIO mode.
Clock setting support is ad-hoc as the corresponding mach is not using
the generic clock infrastructure.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the datasheet, PUE is not effective without PKE set.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer <s.hauer@pengutronix.de> wrote ..
> On Thu, Aug 11, 2011 at 02:37:05PM +0400, Alexander Shiyan wrote:
> > Hello.
> >
> > Please review and apply this simple patch.
...
> Please remove the #ifdef CONFIG_I2C
OK.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
...and update all users. The header file can be used on mx51 and mx53.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX Processors support two different boot modes, the internal
boot mode and the external boot mode. Traditionally the external
NAND boot mode is handled in drivers/mtd/nand and the internal
boot mode is handled in arch/arm/mach-imx. This patch consolidates
the handling of both boot modes in arch/arm/mach-imx so that
the user does not have to look in the mtd kconfig section for
booting from NAND. Also, selecting between internal and external
boot mode now is a clear choice.
The external NAND boot mode has been independent of the mtd nand
driver, but as the code was contained in the NAND driver it was
not possible to support booting from NAND without a mtd nand driver.
This is changed with this patch.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least partly. We have pads in barebox that we do
not have in the kernel. Also, this with this patch we
do not set the sion bit which the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This (re)enables boards to have multiple boot headers so that the one
image can be used for booting from multiple boot sources.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least the FEC and the CAN controller drivers can also be used by the i.MX28.
When still used by IMX, the i.MX28 (and maybe i.MX23) related code must be
ignored.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Simplifies specifying gpio numbers from bank/number info.
From linux kernel.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The patch introducing device macros for i.MX accidently registered a
imx-mmc device for i.MX25/35/51. It should be a imx-esdhc device. This
patch fixes tis
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch fix following compilation warning:
../devices-imx31.h: In function 'imx31_add_fb':
../devices-imx31.h:34: warning: passing argument 2 of 'imx_add_ipufb'
from incompatible pointer type
Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Makes the internal boot source configurable.
Also changes section names slightly so that .flash_header_0x1000 isn't
matched to .flash_header_0x100* etc.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit 5bd9c57d575126448c7d325547538a55e5cd81d6
Author: Juergen Beisert <jbe@pengutronix.de>
Date: Fri Sep 24 14:51:42 2010 +0200
Fix watchdog's register size for the i.MX27 CPU
The watchdog registers on the i.MX27 CPU are 16 bit registers. This patch
just fixes the access macro.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows the use of IIM registers from code which is not mx35 specific.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Kernel pin definitions are more complete and up to date. Being
here we also use seperate files for the iomuxer like the other
i.MX SoCs already do.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch allows using the i.MX (LCDC) framebuffer driver on boards
using an i.MX21 SoC.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows the iomux to reconfigure these pins which are opendrain at
power on and thus can't drive the LCD.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using these macros simplify the configuration for special GPIO usage. But they
should use correct bit positions for usage in the IOMUX_PAD() macro.
Note: These are the bit positions of the i.MX35 CPU. Not checked for the other
i.MX3x CPUs.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Recent changes to the nand_imx driver broke it for i.MX21 systems;
the i.MX21 NAND controller is more akin to the one in i.MX27/i.MX31,
than to the one in i.MX25/i.MX35.
Signed-off-by: Ivo Clarysse <ivo.clarysse@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The flash header is used on different i.MXs other than the
i.MX25, so rename it. Also, add a possibility to put a flash
header on different offsets (0x100, 0x400 and 0x1000), needed
for different boot mediums.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add some (helpful?) comments about the meaning of 'framebuffer' and
'framebuffer_ovl' structure members.
Signed-off-by: Juergenn Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
