The pbl used 'zbarebox.bin' as target instead of the real file. This
lead to strange effects that the images depending on zbarebox.bin were
only built every second time. This uses the full path as target.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We had pbl_cc__o_c instead of pbl_cc_o_c. This caused all pbl object
files to be rebuilt everytime due to missing .cmd file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As new breakout boards are being developped, we need to add their IDs in
the device detection code, otherwise they will be treated as regular
CFA-10036.
Signed-off-by: Brian Lilly <brian@crystalfontz.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We recently gained helper functions for different types of
device parameters. One thing missing was a helper for an
enum type parameter. This patch adds this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some parameters may wish to provide some information about their
meaning or possible values. Provide an info callback for parameters.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This switches the babbage board to probe from devicetree for all
for all devices we currently support probing from devicetree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mc13892 driver knows that it needs spi-cs-high, so the mc13892
will work. The dataflash also connected to this bus though can only
be probed when the mc13892 is inactive. Due to driver probe differences
we can only make sure the mc13892 is inactive when we put the information
into the devicetree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The boot source for the i.MX23 is configured via a few GPIOs, which are later
be used for different purposes (like LCD data for example). The SoC internal
ROM reads these GPIOs and uses the selected boot source.
For various reasons the boot source is also of interest when Barebox is running.
This detection approach reads again the GPIOs. It switches temporarily the pins
to act as GPIOs and input, reads their settings, and switches back to their
previous functions.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some SoCs come up with invalid entries in the data cache. This can
lead to memory corruption when we enable them later, so invalidate
the caches early.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Lucas Stach <l.stach@pengutronix.de>
At least the iMX6 boot rom seems to jump into barebox with a non
invalidated d-cache which causes data corruption when
v7_mmu_cache_flush() executed by arm_early_mmu_cache_flush() overrides
stack or other valid data.
That's why the cache must be invalided for this processors explicitly
(e.g. in barebox_arm_reset_vector()). Operation differs from flush only
in one instruction so that patch modifies the existing
v7_mmu_cache_flush() function slightly by adding an optional argument.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Registers 'r0' till 'r3' are scratch registers and do not need to be
restored.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On ARMv7 the intention is to disable the alignment trap to be able to
use hardware assisted unaligned load/stores. Fix the init to do the
right thing.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no "settings-entries-edit" command. This results in a recursive call
to the settings menu. Use the missing "boot-entries-edit" command instead.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Kernel dts relies on reset default pad settings for the FEC.
Add correct pad settings.
Also, add missing MX51_PAD_NANDF_D11__FEC_RX_DV.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
From Kernel commit 418df63a ARM: 7670/1: fix the memset fix
| Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by
| recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
| with the memset return value. However the memset itself became broken
| by that patch for misaligned pointers.
|
| This fixes the above by branching over the entry code from the
| misaligned fixup code to avoid reloading the original pointer.
|
| Also, because the function entry alignment is wrong in the Thumb mode
| compilation, that fixup code is moved to the end.
|
| While at it, the entry instructions are slightly reworked to help dual
| issue pipelines.
|
| Signed-off-by: Nicolas Pitre <nico@linaro.org>
| Tested-by: Alexander Holler <holler@ahsoftware.de>
| Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The fdt reserve map needs address/size values, not address/end values
like accidently done for generating the reserve entry for the dt.
Reported-by: Jürgen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At early stage after boot, all MVEBU SoCs are similar enough to have
a common lowlevel and barebox entry. We also remap the internal register
base address to 0xf100000 as it gives some 512M more of contiguous address
space. As we cannot determine real memory size that early, we start with
a default memory size of 64M and probe correct size later in SoC init.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX53 fec claims to be compatible to i.MX25 and i.MX53. In barebox
we do not have to make differences between i.MX25 and i.MX27 though, so
just fall back to i.MX27.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have a possibility to register a MAC address provider
based on a ethernet device id. This adds a similar functionality
for devices probed from devicetree. Code can register itself to
be a MAC address provider for a certain devicetree node.
This helps on i.MX to let the IIM unit provide a MAC address for
the FEC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The pinctrl support is devicetree only, so only register it
when we actually have a devicetree. Otherwise we crash boards
using the iomux-v3 from platform code in pinctrl_register().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This just add more visible separators between each subconfig of the
supported Marvell EBU SoCs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to populate the devices from the devicetree based on the
presence of the 'reg' property. This is incorrect since this only
allows us to probe devices with resources.
Instead use the 'simple-bus' property to see if we have iterate
deeper. This also registers devices with their buses as parents.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
memory is always in /mem, so call of_add_memory from of_probe once
instead of in the recursive tree iteration. This makes it possible
to limit the device population to nodes with the "simple-bus" property
set.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When registering devices from the devicetree we check if these
devices already exist. When doing this not only check the resource
start but also the resource end.
This helps with the probing of simple buses for which child nodes
often begin at the very same address as the parents.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Based on the same Linux commit from Stephen Warren:
commit b40b25fff8205dd18124d8fc87b2c9c57f269b5f
Author: Stephen Warren <swarren@nvidia.com>
Date: Wed Mar 6 10:58:37 2013 -0700
kbuild: always run gcc -E on *.dts, remove cmd_dtc_cpp
Replace cmd_dtc with cmd_dtc_cpp, and delete the latter.
Previously, a special file extension (.dtsp) was required to trigger
the C pre-processor to run on device tree files. This was ugly. Now that
previous changes have enhanced cmd_dtc_cpp to collect dependency
information from both gcc -E and dtc, we can transparently run the pre-
processor on all device tree files, irrespective of whether they
use /include/ or #include syntax to include *.dtsi.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This brings us the following which we need for dtb file generation.
commit 2ab8a99661f4ce052bbad064237c441371df8751
Author: Stephen Warren <swarren@nvidia.com>
Date: Wed Mar 6 10:27:45 2013 -0700
kbuild: fixdep: support concatenated dep files
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When using a builtin dtb the builtin dtb is built twice, once
from as a dependency of the 'dtbs' target and once as a dependency
of the corresponding dtb.o target. This can happen in parallel
with parallel make which results in build corruption when two
processes try to generate the dtb at the same time. Typical errors
include:
fixdep: error opening depfile: arch/arm/dts/.imx51-babbage.dtb.d: No such file or directory
make[1]: *** [arch/arm/dts/imx51-babbage.dtb] Error 2
fixdep: arch/arm/dts/.imx51-babbage.dtb.d is empty
mv: cannot stat `arch/arm/dts/.imx51-babbage.dtb.tmp': No such file or directory
make[1]: *** [arch/arm/dts/imx51-babbage.dtb] Error 1
To fix this build the devicetree blobs using extra-y instead of
a separate target.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Although conclusions in 50d1b2de8e "ARM
v7: Fix register corruption in v7_mmu_cache_off" are correct, the
implemented fix is not complete because the following failure can
happen:
1. d-cache contains the cache line around 'sp'
2. v7_mmu_cache_off() disables cache
3. early v7_mmu_cache_flush() pushes 'lr' on uncached stack
4. v7_mmu_cache_flush() flushes d-cache and can override stack written
by step 3.
5. v7_mmu_cache_flush() pops 'lr' out of cache and jumps to it which
might be random data now.
Patch avoids step 3 which is easy because 'lr' is never modified by the
function. By using the 'r12' scratch register instead of 'r10', the
whole initial 'push' can be avoided.
Patch moves also the 'DMB' operation so that it is executed after data
has been pushed on stack.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Patch adds gpio_to_desc helper for validate GPIO.
A bit optimization is performed (about -160 bytes on ARM).
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Brian Lilly
Jan Luebbe
Juergen Beisert
Enrico Scholz
Lucas Stach
Steffen Trumtrar
Nicolas Pitre
Sebastian Hesselbarth
Gregory Hermant
Alexander Shiyan