It wasn't hard to find the right spot to copy the image
to before, but this makes it a bit more explicit.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The voltage for programming the fuses is external to the SoC and
on some boards this is controllable with a regulator, so add regulator
support to the iim driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Allow to read/write the registered MAC addresses in the iim
module directly via a device parameter.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX5 iim has an additional bit in the CCM module which
enables the supply. Add support for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
imx_iim_read is a iim internal function, so access the
internal functions rather than using the cdev API.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With devicetree devicenames start with numbers. Parameters on these
devices are not accessible since variables can't start with numbers.
Register a logical 'iim' device which makes the permanent_write_enable
and explicit_sense_enable parameters accessible again.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of duplicating data shared between the banks in a bank
specific struct, use a iim struct and a bank struct.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* fix indentation of options in 'help bootm'
* add missing help for -m
* put some output into debug/verbose mode
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As stated in section 29.19.32 of SAMA5D3 Series datasheet, to move
from CS(n) to CS(n+1) the stride is 0x14 and not 0x10 as in the
other AT91 CPUs
Signed-off-by: Matteo Fortini <matteo.fortini@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The MB 77.07 is a small (80x80 mm) single-board computer
developed in Russia by the RC Module.
It was developed as an educational board for К1879ХБ1Я SoC
capabilities demonstration.
See http://www.module.ru/en/catalog/micro/micro_pc/ for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds minimal support for the UEMD SoCs
from RC Module (http://www.module.ru).
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use stdout-path instead of linux,stdout-path and use &uart format
instead of writing the full path.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I assume I am the only person knowing that barebox is able to
merge devicetrees. This feature seems broken for a while now since
trying to merge devicetress results in:
unflatten: too many end nodes
Remove this feature to save the complexity.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Update cpuinfo to display the current CPU implementation
using the VR2 register defined in the architecture specification
v1.0
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The relocation code can now relocate from anywhere to
the RAM.
The old code assumed that the binary was copied to the RAM
by some PBL and then it just relocated the .text section
from the loaded address to the linked address.
Now, it first checks if vectors are somewhere else than the
linked address. If yes, there are copied to address 0 (or
to the exception vector base address if register EVBAR is
present).
Then, the .text section is relocated from its current location
to the RAM.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The OpenRISC architecture specification v1.0 defines
new SPR registers. This patch adds registers definition
for group 0 and update bit definitions for the CPU
configuration register.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ARM pbl is linked at (TEXT_BASE - SZ_2M). This conflicts with the temporary
stack used in s3c24x0_nand_boot. Moving the stack to (TEXT_BASE - SZ_2M) fixes
this problem. With this patch a compressed barebox with pbl can boot on
mini2440 from NAND.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Lucas Stach
Lucas Stach
Bo Shen
Holger Schurig
Matteo Fortini
Antony Pavlov
Franck Jullien
Michael Olbrich
Silvio Fricke
Wadim Egorov