The PMIC is often a dependency for other devices, so make sure
it's initialized early. While at it, merge the spi/i2c registration
into a single initcall and use IS_ENABLED instead of ifdefs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some boards have to initialize the PMIC before other devices can
be initialized. This requires three levels of initcalls: one level
in which the PMIC is probed, one in which the board can call mc13xxx_get()
and the third one to initialize the PMIC dependent devices.
Allow to register a callback which is called once the PMIC is initialized.
This way mc13xxx_get() is no longer necessary and the number of required
initcalls levels is reduced to two.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This creates a imx_defconfig which in future can catch all
non thumb i.MX boards not covered by imx_v7_defconfig. Right
now the Karo TX25 and Phytec phyCARD i.MX27 can so multi image
support. They are enabled in the new config and the previous
board specific config is removed.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the clocks for the IPU on i.MX5. Since these are many only
add them when the driver is enabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
i.MX5 has clock number defines in dt-bindings, use them rather
then manually keeping the clock enums in sync.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX barebox update handlers take an optional dcd table as argument.
This can be used to add the correct dcd data to the image before flashing
it.
This mechanism is quite complicated and largely unused, so remove it. With
this it is only possible to flash the exact image passed to barebox_update,
which is what is mostly done anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When a devicenode has invalid pinctrl settings then printing the
offending node helps debugging it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This isn't much different from the default 1,16V
and I haven't seen this make a difference on any
board, but it seems to be required for some T30 SKUs.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It's not safe to ramp up the CPU clock speed to
1,4 GHz on all T30 SKUs, as this may result in failure
to start the kernel properly. Start CPU at 600 MHz,
which is safe even for the slowest SKUs.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This board wasn't changed properly, as it was merged in the short
timeframe where the signature change waited to be applied. Change
it now to get rid of the compiler warning.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We use 'u32' type in stdlib.h so we have to include types.h.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For small systems we would put the zImage at 32KiB after
the start of memory, and put the DT a bit after the uImage.
The kernel will always try to relocate itself and overwrite
the DT.
Try to be more clever at uImage placement to avoid
triggering the kernel relocation.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For small systems we would put the zImage at 8MiB after
the start of memory, and put the DT a bit after the zImage.
When we encounter an image which is bigger than 8MiB
uncompressed, the kernel would try to relocate itself
and overwrite the DT.
Try to be more clever at zImage placement to avoid
triggering the kernel relocation.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If we have two discontinuous memory banks we want to move
the malloc area into the upper bank by default to leave as
much free space in the lower bank, where we have to place
kernel, oftree and initrd.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Not needed anymore, as barebox now accepts FDTs outside
of it's visible DRAM, as long as it's a valid pointer.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Not needed anymore, as barebox now accepts FDTs outside
of it's visible DRAM, as long as it's a valid pointer.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Not needed anymore, as barebox now accepts FDTs outside
of it's visible DRAM, as long as it's a valid pointer.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Mostly to make it clear that boarddata needs to be
something we can dereference.
As this is a pretty invasive change, use the opportunity
to make the signature 64bit safe.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
FUSEs (OTP registers) can be written via /dev/imx-ocotp character device.
For example, writing MAC 12:34:56:78:9A:BC can be performed as
> mw -l -d /dev/imx-ocotp 0x8c 0x00001234
> mw -l -d /dev/imx-ocotp 0x88 0x56789ABC
and reading as
> md -l -s /dev/imx-ocotp 0x88+8
00000088: 56789ABC 00001234
, where 0x88 (0x22*4) and 0x8C (0x23*4) are offsets of MAC OTP registers.
Notice: FUSEs are PROM, so "0" (unprogrammed) bits
can be replaced with "1" (but not vice versa) only once.
Also, for MAC there are convinient parameters:
> ocotp0.permanent_write_enable=1
> ocotp0.mac_addr=12:34:56:78:9A:BC
imx_ocotp 21bc000.ocotp: reloading shadow registers...
imx_ocotp 21bc000.ocotp: reloading shadow registers...
> echo $ocotp0.mac_addr
12:34:56:78:9A:BC
Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Silvio Fricke
Lucas Stach
Antony Pavlov
Lucas Stach
Beniamino Galvani
Uladzimir Bely