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Author SHA1 Message Date
Alexander Aring 43afe67390 barebox-data: add barebox-data sections
Add barebox-data section in arm branch to get complete
barebox regions in sdram regions tree.

Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-18 11:56:50 +01:00
Alexander Aring d32b75f003 arm-mmu: move PAGE_ALIGN macro to common.h
PAGE_ALIGN macro is needed to align addresses to page boundaries.
Move this macro to another PAGE_* defines.

Commands which uses remap_range function needs this macro.

Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-18 08:28:24 +01:00
Alexander Aring 47326f80a9 remap_range: make function 'remap_range' global
Change function remap_range in arm architecture to make it
global accessable. For example command 'memtest' can change
pte flags to enable or disable cache.

Add dummy function for others architectures that doesn't
have mmu or pte support.

Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-18 08:28:20 +01:00
Sascha Hauer cbc3e0f6d4 Merge branch 'delivery/at91_fixes' of git://git.jcrosoft.org/barebox 2013-01-15 15:33:08 +01:00
Jean-Christophe PLAGNIOL-VILLARD e3adde61c1 at91sam9g45: fix i2c typos
arch/arm/mach-at91/at91sam9g45_devices.c: In function 'at91_add_device_i2c':
arch/arm/mach-at91/at91sam9g45_devices.c:158:42: error: 'pdata_i2c' undeclared (first use in this function)
arch/arm/mach-at91/at91sam9g45_devices.c:158:42: note: each undeclared identifier is reported only once for each function it appears in
arch/arm/mach-at91/at91sam9g45_devices.c:163:8: error: expected ':' or '...' before ';' token
arch/arm/mach-at91/at91sam9g45_devices.c:166:8: error: expected ':' or '...' before ';' token

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2013-01-15 00:26:19 +08:00
Jean-Christophe PLAGNIOL-VILLARD 8c93adeb0a at91: sam9x5ek: use -EINVAL for invalid gpio on 1-wire
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2013-01-15 00:26:14 +08:00
Sascha Hauer 958eaf4c9d ARM panda: do not set gpio direction of heartbeat LED
We now have gpio_request. When we call gpio_direction_output before
registering a led_gpio the gpio will be implicitely requested by the
gpio core. gpio_request in the led core will then fail resulting in
an unregistered LED.
Fix this by removing the call to gpio_direction_output. The LED core
will do this anyway.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-14 13:40:52 +01:00
Alexander Aring 1431f4a7fc arm-mmu: remove semicolon in arm mmu.c
Remove semicolon in PAGE_ALIGN macro.

Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-14 13:21:39 +01:00
Sascha Hauer 46dae550cd ARM am33xx: the hsmmc is a omap4 type mmc controller
The am33xx hsmmc controller is actually a omap4 type controller which
means that it has a 0x100 offset in the registers.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-10 20:41:42 +01:00
Sascha Hauer db31ccf293 Merge branch 'for-next/omap' 2013-01-09 10:29:08 +01:00
Sascha Hauer fca2d79470 Merge branch 'for-next/mxs' 2013-01-09 10:29:08 +01:00
Sascha Hauer b0ab3c220f Merge branch 'for-next/misc' 2013-01-09 10:29:08 +01:00
Sascha Hauer 2497433516 Merge branch 'for-next/mips' 2013-01-09 10:29:08 +01:00
Sascha Hauer 8c46b854f7 Merge branch 'for-next/imx' 2013-01-09 10:29:08 +01:00
Sascha Hauer 21a0fc1ce3 Merge branch 'for-next/gpio-request' 2013-01-09 10:29:07 +01:00
Sascha Hauer 04cb446c9a ARM omap / mci: Fix register offsets
Only the OMAP4 has a register offset of 0x100 in the register space. Fix
this by using the device id mechanism. This became broken when the device
register convenience functions were introduced.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-08 10:02:13 +01:00
Jean-Christophe PLAGNIOL-VILLARD 4db8ba4be3 at91: add dump mux command
This will allow to dump all pin configuration in a nice table
and if the bank/pin is specified the pin details

barebox@Atmel at91sam9x5-ek:/
Pin     PIOA            PIOB            PIOC            PIOD

0:      [gpio] set      [periph A]      [gpio] set      [periph A]
1:      [periph A]      [periph A]      [gpio] set      [periph A]
2:      [gpio] set      [periph A]      [gpio] set      [periph A]
3:      [gpio] set      [periph A]      [gpio] set      [periph A]
4:      [gpio] set      [periph A]      [gpio] set      [gpio] clear
5:      [gpio] set      [periph A]      [gpio] set      [gpio] set
6:      [gpio] set      [periph A]      [gpio] set      [periph A]
7:      [gpio] set      [periph A]      [gpio] set      [periph A]
8:      [gpio] set      [gpio] set      [gpio] set      [periph A]
9:      [periph A]      [periph A]      [gpio] set      [periph A]
10:     [periph A]      [periph A]      [gpio] set      [periph A]
11:     [periph A]      [gpio] set      [gpio] set      [periph A]
12:     [periph A]      [gpio] set      [gpio] set      [periph A]
13:     [periph A]      [gpio] clear    [gpio] set      [periph A]
14:     [gpio] set      [gpio] clear    [gpio] set      [gpio] set
15:     [periph A]      [gpio] set      [gpio] set      [gpio] set
16:     [periph A]      [gpio] set      [gpio] clear    [periph A]
17:     [periph A]      [gpio] set      [gpio] set      [periph A]
18:     [periph A]      [gpio] set      [gpio] set      [periph A]
19:     [periph A]      [periph A]      [gpio] set      [gpio] set
20:     [periph A]      [periph A]      [gpio] clear    [gpio] set
21:     [gpio] set      [periph A]      [gpio] clear    [gpio] clear
22:     [gpio] set      [periph A]      [gpio] set      [periph A]
23:     [gpio] set      [periph A]      [gpio] set      [periph A]
24:     [gpio] set      [periph A]      [gpio] set      [periph A]
25:     [gpio] set      [periph A]      [gpio] set      [periph A]
26:     [gpio] set      [periph A]      [gpio] set      [periph A]
27:     [gpio] clear    [periph A]      [gpio] set      [periph A]
28:     [gpio] set      [periph A]      [gpio] clear    [periph A]
29:     [gpio] set      [periph A]      [gpio] set      [periph A]
30:     [gpio] set      [periph A]      [gpio] set      [periph A]
31:     [gpio] set      [periph A]      [gpio] set      [periph A]
barebox@Atmel at91sam9x5-ek:/
pioA27 configuration

[gpio] clear
multidrive = disable
pullup = disable
degitch = disable
debounce = disable
pulldown = enable
schmitt trigger = enable

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:56:59 +01:00
Jean-Christophe PLAGNIOL-VILLARD 9ce0055e9c at91: drop AT91_BASE_PIOx for soc specific one for none boot code
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:56:58 +01:00
Jean-Christophe PLAGNIOL-VILLARD a0f94be44e at91: introduce AT91SAM9_SMC and AT91SAM9_TIMER
to select the smc and timer for at91sam9 soc

This will allow to simplify the Makefile

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:56:58 +01:00
Jean-Christophe PLAGNIOL-VILLARD 5155a0235f at91: wdt: drop AT91_SYS_BASE
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:56:58 +01:00
Jean-Christophe PLAGNIOL-VILLARD 398f4b17da at91: SMC: switch to platform_driver
This will allow to support multiple arch

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:56:58 +01:00
Jean-Christophe PLAGNIOL-VILLARD 29597813dc at91: autodetect the soc one time at postcore_initcall
and then register a device

The code is take from linux

drop AT91_BASE_SYS for dbgu

factorise the soc type in the Kconfig but keep the ARCH_ so far
as the device code have the same function accross soc which for now does not
allow us to compile soc together

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:56:58 +01:00
Jean-Christophe PLAGNIOL-VILLARD 49edc4c987 at91: PIT: switch to platform_driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:56:58 +01:00
Jean-Christophe PLAGNIOL-VILLARD e7edecb87a at91: at91sam9: provide its own clkdev for pit
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:33:24 +01:00
Jean-Christophe PLAGNIOL-VILLARD 64c94fcd76 at91: sync with the kernel address base
add non AT91_SYS_BASE offset base address define

This will prepare for multi arch support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:33:24 +01:00
Jean-Christophe PLAGNIOL-VILLARD a23017d350 at91: introduce Kconfig to select the dbgu for lowlevel debug
so we can drop AT91_BASE_SYS too

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:33:24 +01:00
Jean-Christophe PLAGNIOL-VILLARD f81bcf17b3 at91: pmc: drop AT91_BASE_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:33:24 +01:00
Jean-Christophe PLAGNIOL-VILLARD 75fb25220c at91: factoryse PMC address as it's the same on every soc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:33:24 +01:00
Jean-Christophe PLAGNIOL-VILLARD 22b1b8fff7 at91: enable clock via clock framework
fix at91sam926x timer and dss11

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-07 18:33:19 +01:00
Jean-Christophe PLAGNIOL-VILLARD 3b172627e0 at91sam9x5ek: switch heartbeat to d2 (pioD21)
as d1 pioB18 is used for the one wire too

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-02 11:04:23 +01:00
Jean-Christophe PLAGNIOL-VILLARD 7200ef1dba at91: factorise dbgu address
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-02 10:59:59 +01:00
Jean-Christophe PLAGNIOL-VILLARD 4d97a1fc9c at91: switch to gpiolib
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-22 16:40:33 +01:00
Jean-Christophe PLAGNIOL-VILLARD eb5eb6c147 at91: gpio: switch to ops
imported from the kernel

this allow to simplify the mux implemtation and will simplify the gpio support
from bare_init or pbl

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-22 16:40:33 +01:00
Jean-Christophe PLAGNIOL-VILLARD 99bb1fbd6d at91: gpio: switch to device driver
this is the first step to prepare the switch to the gpiolib

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-22 16:40:33 +01:00
Jean-Christophe PLAGNIOL-VILLARD 521f3a53b3 at91: drop PIN_BASE offset for gpio
so 0 is a valid gpio as cleanned in the kernel

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-22 16:40:33 +01:00
Jean-Christophe PLAGNIOL-VILLARD 6f7b297b7a at91: use -EINVAL for invalid gpio
switch gpio type from u8 to int in the data struct

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-22 16:40:33 +01:00
Jean-Christophe PLAGNIOL-VILLARD 8ad5725465 at91: use gpio_is_valid to check gpio
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-22 16:40:33 +01:00
Wjatscheslaw Stoljarski (Slawa) b46b57f35a MFD MC34708: Add dependence on SPI
MC34708 depend on I2C or SPI, so let driver depend on SPI too
and rename config option name to MFD_MC34708.

Signed-off-by: Wjatscheslaw Stoljarski <wjatscheslaw.stoljarski@kiwigrid.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-21 12:18:08 +01:00
Teresa Gámez c0e2114260 pcm051: Add inital support
Added initial support for Phytec phyCORE-AM335x.

Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-21 08:31:19 +01:00
Teresa Gámez 8eb8f4f77e ARM OMAP: Apply EHCI device register functions
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-21 08:31:19 +01:00
Teresa Gámez 80757c2d51 ARM OMAP: Add EHCI to device register functions
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-21 08:31:19 +01:00
Teresa Gámez fb5dcbefe7 ARM OMAP: Apply RAM device register functions to boards
Apply RAM and SRAM register functions to all OMAP boards.

Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-21 08:30:37 +01:00
Teresa Gámez eb68d9a51b ARM OMAP: Add SRAM and DRAM to device register functions
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-21 08:28:05 +01:00
Teresa Gámez 145fe7c167 ARM AM33XX: Add mmc0 pin mux function
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-21 08:27:26 +01:00
Jan Luebbe fa012d47e4 arm: beaglebone: add first-stage support for AM335x and board
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-20 12:30:26 +01:00
Teresa Gámez 024698e43a ARM AM33XX: Add MMC Bases
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-20 12:27:38 +01:00
Teresa Gámez 9b864a7633 ARM OMAP4: Add EHCI base define
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-20 12:27:23 +01:00
Teresa Gámez e7a963b90c ARM OMAP4: Add SRAM base define
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-20 12:27:23 +01:00
Jan Luebbe 763487a40c arm: omap: am33xx: add support for low level debug
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-20 11:43:10 +01:00
Teresa Gámez 4746717a5d ARM OMAP AM33XX: create new ARCH for AM33xx
Created ARCH for AM33xx boards as second stage bootloader.
This includes:
- Added dmtimer0
- Created basic header files
- Added MMC support for ARCH_AM33XX
- Added reset function

Signed-off-by: Teresa Gámez <t.gamez@phytec.de>

Some header file cleanup by:
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-12-20 11:43:10 +01:00