These symbols where defined for the A9M2440 platform. Rename them to the
platform they now belong to.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The S3C2440 CPU comes with an internal OHCI the generic part of
Barebox already supports. Just add the missing part.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently, there are multiple definitions of run_shell()
for each board that can be build in "xload" configuration.
Now there is only one function used by all boards.
The functions defined in xload.c are used only when "xload"
configuration used; but it gets compiled unconditionally.
This has been fixed as well.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The environment partition was overlapping the Barebox partition in
those three Atmel boards. Saving the environment resulted in the
Barebox being overwritten.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow for some generic io accessors introduce io.h and use
this instead of asm/io.h throughout the tree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Commit c71a77ab8 (ns16550: switch to resource) has introduced generic
read/write access to 16550 register and a 'shift' parameter to allign
register index to physicall registers.
The correct 'shift' value was missing in all omap based boards.
Corrected this to 2 which has fixed the problem.
Tested on a PCM-049 phyCORE-OMAP4 board.
Signed-off-by: Juergen Kilb <J.Kilb@phytec.de>
Tested-by: Jan Weitzel <J.Weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit 7d25a0552dd3a4b65412ae1cbf8f9ca8a88b5d27
Author: Juergen Beisert <jbe@pengutronix.de>
Date: Thu Nov 25 17:49:11 2010 +0100
Keep frequency multiplier enabled to be able to do a warmstart
The wachtdog's reset does only reset the ARM core, not the whole silicon.
But the PLLs seems to do some strange things: It seems they switch back to
the low frequency reference when the watchdog barks. But in the case the
frequency multiplier is off (not used due to 26 MHz reference usage) the
machine stops, because the PLLs are stopping due to the lack of a reference
frequency. As the power on reset will set the FPM_EN bit again, a power cycle
brings the machine back to life.
By keeping the frequency multiplier enabled, also a warmstart triggered by the
watchdog can restart the machine now.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Set new CS0 values for new NOR-Flashes (28F256P33BF).
These values also work with older flashes (28F256P33B).
Also removed unnecessary setup of CSO in the core_init call.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Updated mx53 ddr3 script in order to align with the latest Freescale version from July 8, 2011:
-change ESDREF[REF_SEL]=01 (for 32KHz), from incorrect setting of 00 (64KHz)
-change DDR3 MR0 write to "setmem /32 0x63fd901c = 0x052080b0" from "0x092080b0".
This changes write recovery from 8 clocks to 6 clocks(in line with ESDCFG1[tWR])
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some older pcm043 only work correct when cpu frequency is set up
to 399MHz. All modules with revision >= 1315.4 are equipped
with a i.MX35 TO2.1 and do run with 532MHz.
Check the silicon revision and set up the frequency accordingly.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer <s.hauer@pengutronix.de> wrote ..
> On Thu, Aug 11, 2011 at 02:37:05PM +0400, Alexander Shiyan wrote:
> > Hello.
> >
> > Please review and apply this simple patch.
...
> Please remove the #ifdef CONFIG_I2C
OK.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The new MMU setup will need SDRAM base addresses and sizes.
For this reason convert the MMU enabled ARM boards:
- move mem setup to mem_initcall. This is early but
still makes sure that we already have the console available
- move MMU setup in this initcall temporary as after the mmu_init will generic
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
use generic read/write depending on the memory size
if no reg_read/write defined
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
pass the hccr and hcor register base via resource
instroduce add_generic_usb_echi_device with hccr = base + 0x100 and
hcor = base + 0x140
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
...and update all users. The header file can be used on mx51 and mx53.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add a helper function for boards to register their memory
devices. This makes the board code smaller and also helps
getting rid of map_base and struct memory_platform_data.
And switch all of the memory to it
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
we keep struct memory_platform_data for now on we will switch off the memories
resources to struct resource
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)
so we will match the erase block size
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If booting from NAND GPMC_IRQ_ENABLE is not cleared, causing crash if kernel
request the gpmc irq. gpmc_generic_init clears GPMC_IRQ_ENABLE
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix following warning:
arch/arm/boards/karo-tx25/lowlevel.c: In function 'board_init_lowlevel':
arch/arm/boards/karo-tx25/lowlevel.c:75:6: warning: unused variable 'i'
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix following warning:
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c: In function 'eukrea_cpuimx35_devices_init':
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c:176:15: warning: unused variable 'tmp'
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The original plan was to add all omap devices into the boards/omap
directory. Anyway, there will be reasons to put a board somewhere
else, so move the generic parts into the omap architecture directory.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When booting from NAND, its important to know the correct page size. When
the NAND is used as the boot source, four dedicated pins are used to configure
the correct page size and address cycles. These pins can be read back in one
of the NFC registers to parametrize the load function.
This patch also extends the read routine to support more than four address
cycles on demand.
BTW: At least some mini2440s are misconfigured to use five address cycles for
a NAND device that is known to need only four address cycles. In this case the
vendor is at our side: This NAND simply ignores any additional address cycles
than required.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
before we can only support tftp
so keep it as default
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)
so we will match the erase block size
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Often enough the exception vectors are not on TEXT_BASE (for example
on i.MX SoCs in internal boot mode), so the board specific code did
not map the exception vectors to 0x0 but whatever happens to be on
TEXT_BASE. Also, the current section-only mapping requires the
exception vectors to be on a 1MB boundary.
Instead, create the possibility to create second level tables and
use this to map a copy of the exception vectors in a board
independent way.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To prevent turning on the display before the signals are stable.
Also, put the LCD_CS pin in the same mode as the kernel does to
prevent flickering.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also adapt the config file to the default environment.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With this patch barebox can now be booted from RAM, NOR and NAND on the
mini2440 platform. 'CONFIG_S3C24XX_NAND_BOOT' must still be 'y' to be able to
boot from NAND.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The default configuration of the mini2440 in the current 2.6.37 kernel uses
a flash based BBT. So, the barebox for the mini2440 must also use one, to be
in sync with the kernel about bad blocks in the flash.
Due to the used OOB layout, the generic BBT description coming with the
framework can be used.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Without this modification saving a modified environment ends with:
mini2440:/ saveenv
saving environment
could not open /dev/env0: Read-only file system
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is required in order to enable booting from NAND, when there is no
other first level bootlader.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If the SDRAM type will change in the future, only the 'config.h' must be
adapted to the new settings. The real size will be read back from this setting.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is required in order to enable booting from NAND and to avoid any visible
garbage on the screen until the pins are really set.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is required in order to enable booting from NAND and using the generic
S3C2440 setup routines.
Two types of SDRAM devices are known to be shipped by FriendlyARM. This config
should work on both of them. But it is really tested only for the HY57V561620
type.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is required in order to enable booting from NAND and using the generic
S3C2440 setup routines.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least partly. We have pads in barebox that we do
not have in the kernel. Also, this with this patch we
do not set the sion bit which the kernel does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
we use the board revision to specify to the linux kernel the type of lcd
we use. So we can have only one machine for those 3 boards:
- sam9m10-ekes (LG)
- sam9g45-ekes (LG)
- sam9m10g45-ek (Truly)
today we support 2 lcds model:
- LG philips LB043WQ1
- Truly TFT1N4633-E
by default we select the Truly as the sam9m10g45-ek is the most common board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Also, make sure that the usb ports are in ulpi mode before configuring
the iomuxer. Otherwise the ulpi transceiver cannot be initialized correctly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With the change to Hz as the main clock unit on the STM architecture the
Chumby must also use this unit.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Michael Grzeschik
Jean-Christophe PLAGNIOL-VILLARD
Sascha Hauer
Juergen Beisert
Sanjeev Premi
Fabio Estevam
Thomas Petazzoni
Juergen Kilb
Teresa Gámez
shc@milas.spb.ru
Marc Kleine-Budde
Hubert Feurstein
Jan Weitzel
Alexey Galakhov
Marek Belisko
Thomas Mayer
Juergen Beisert
Eric Bénard