The fanless boards now have a 7-digit (XXXXX-F) board name. This
triggers a border condition when reading this string in the IVM although
this string is smaller than the currenly read string size, but only by 1
character.
This patch corrects this by changing the size check condition for string
length. It is the same change that was done in the platform for this
same bug.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Stefan Bigler <stefan.bigler@keymile.com>
* 'master' of git://git.denx.de/u-boot-usb:
MUSB driver: Timeout is never detected as the while loop does not end
usb: fix ulpi_set_vbus prototype
pxa25x: Add UDC registers definitions
USB: Fix strict aliasing in ohci-hcd
usb: Optimize USB storage read/write
ehci: Optimize qTD allocations
usb_stor_BBB_transport: Do not delay when not required
usb_storage: Remove EHCI constraints
usb_storage: Restore non-EHCI support
ehci-hcd: Boost transfer speed
ehci: cosmetic: Define used constants
ehci: Fail for multi-transaction interrupt transfers
arm:trats: Enable g_dnl composite USB gadget with embedded DFU function on TRATS
arm:trats: Support for USB UDC driver at TRATS board.
dfu:cmd: Support for DFU u-boot command
dfu: MMC specific routines for DFU operation
dfu: DFU backend implementation
dfu:usb: DFU USB function (f_dfu) support for g_dnl composite gadget
dfu:usb: Support for g_dnl composite download gadget.
ehci: cosmetic: Define the number of qt_buffers
Signed-off-by: Wolfgang Denk <wd@denx.de>
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
tx25: Use generic gpio_* calls
config: Always use GNU ld
tools: add kwboot binary to .gitignore file
fdt: Include arch specific gpio.h instead of asm-generic/gpio.h
serial: CONSOLE macro is not used
Conflicts:
board/karo/tx25/tx25.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
A lot of at91 boards have the console_init_f in board_init. This is useless
cause it was called before by generic code in lib/board.c.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Jens Scharsig <esw@bus-elektronik.de>
cc: Stelian Pop <stelian@popies.net>
cc: Sedji Gaouaou<sedji.gaouaou@atmel.com>
cc: Albin Tonnerre <albin.tonnerre@free-electrons.com>
cc: Eric Benard <eric@eukrea.com>
Tested-by: voice.shen@atmel.com
Tested-by: voice.shen@atmel.com
Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
fix a bug:
when not boot from NAND, the NAND flash can not be detected.
Using this to fix it
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Support for USB UDC driver at trats board.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().
Since no_snoop was only used on i.MX, get rid of it BTW.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
The macro to get the gpio number id was renamed to
IMX_GPIO_NR as in kernel. Fix the wrong name in efika.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matt Sealey <matt@genesi-usa.com>
Acked-by: Matt Sealey <matt@genesi-usa.com>
We have no idea where the DCD was derived from for Smartbook support, but they
differ from the Smarttop settings, MX51EVK settings and certainly don't
correspond to any shipped or development version of U-Boot that Genesi has ever
had on any Smartbook.
So, copy the calibrated, verified settings from the U-Boot as shipped with every
Smartbook since retail production. Remove those few settings that just set the
POR defaults which have already been confirmed for the previous Smarttop DCD
change.
One of the lines is specific to i.MX51 TO3 designs and therefore TO2 Smartbooks
will possibly not work so reliably with this new DCD; that said, TO2 Smartbooks
basically don't exist at retail and the number of units in the world is less
than 5 (3 of which are at the Genesi office or owned by Genesi employees).
Many hours of memory testing confirms the new settings are stable.
Patch v2:
* picked the correct commit from our development tree, correcting tuned DDR ODF setting
(which was correct anyway)
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
This is a rework of a previously submitted patchset and bundles the
main board support and USB support into a single commit.
It requires the patch "mx5: add iomux-mx51.h include"
* Use iomux-mx51.h include to simplify board configuration.
* Simplify LED support (remove efikamx_toggle_led, change lit LEDs).
* Simplify MMC support for CD and WP pin differences.
* Fix broken CPU voltage setting - comment said 1.1V but the code set to
1.2V. It should never have been set to 1.2V even on i.MX51 TO2 and
all available Linux kernels would drop the voltage to 1.1V anyway and
work reliably. This should lower power consumption during the boot
process.
* Function renames for readability.
* Some board identification string changes to match actual product names.
* Passes checkpatch (v2)
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Cc: Stefano Babic <sbabic@denx.de>
PCBID pads seem to need time to settle due to external pulldowns, otherwise
we are reading floating GPIO pins with implicit pad pullups and get the wrong
data. However we can't "wait" at the time we need them before relocation,
since timers are not available. The time taken to get from DCD to the code
requiring the pads set seems to be more than long enough (even with caches
enabled).
We have space in the DCD due to the DDR settings changes to configure all
the pad settings we need for this, plus the LED pad settings too which
reduces the amount of code required later on.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Efika MX boards configure their DDR pad settings twice, one in the DCD generated
from imximage_*.cfg and again in init_drive_strength called before relocation.
Rather than doing this, roll the changes it makes into the DCD so DDR is set up
before a single line of code in U-Boot is run.
The settings are identical with this DCD block which is shorter (by 7 entries)
than the old one, and after the output of init_drive_strength since a lot of the
functionality in the existing DCD and init_drive_strength function was just
setting the POR defaults. This goes to explain some now-missing entries.
Several hundred rounds of mtest have been run to test the settings before and
after to confirm DDR is stable and no ill-effects have been found.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
* Move Efika MX Smarttop and Smartbook boards into a "genesi" vendor directory
* Rename efikamx -> mx51_efikamx since there is an mx53_efikamx and mx6_efikamx to come
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Align the SSP clock speed with oscilator to achieve
higher transfer stability.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
The DRAM initialization, after SPL has complete, is exactly the same
for all mxs SoCs so we should name it accordinly.
The following boards has been changed:
* apx4devkit
* m28evk
* mx28evk
* sc_sps_1
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
Each i.MX has its own gpio.h, defining the same structure.
The internal GPIO controller has the same layout
(at least for the register used by u-boot) and can be shared.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Matt Sealey <matt@genesi-usa.com>
This allows a watchdog reset to start the ROM's
usb/serial downloader, or boot from an sdcard.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This patch sets UART3 and MMC channle 0 for Exynos5250 Rev 1.0
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The patch adds the memory initialization sequence of DDR3.
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add new clock values for Exynos5250 Rev 1.0
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Default spl/u-boot-spl.lds created by spl/Makefile resolves
the spl text load addr to 0x0. As 0x0 belongs to iROM addr so
Global variables can not be used.
Adding specific smdk5250-uboot-spl.lds makes possible to use Global Variables
in spl.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Move warmboot_save_sdram_params() to later in the boot sequence. This
code relies on devicetree to get the address of the memory controller
and with upcoming changes for SPL boot it gets called early in the
boot process when devicetree is not initialized yet.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Don't use timer_init from tegra board.c. This comes out of arm720t
for the SPL build.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Change the mkdir commands for the object directories to be
unconditional. This fixes an issue when building for SPL where
SRCTREE and OBJTREE are the same, but $(obj) is under SPLTREE.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The Raspberry Pi model B uses the BCM2835 SoC, has 256MB of RAM,
contains an SMSC 9512 USB LAN/Hub chip, and various IO connectors.
For more details, see http://www.raspberrypi.org/.
Various portions (cache enable, MACH_TYPE setup, RAM size limit, stack
relocation to top of RAM) extracted from work by:
Oleksandr Tymoshenko <gonzo@bluezbox.com>.
GPIO driver enablement by Vikram Narayanan <vikram186@gmail.com>.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Tom Rini <trini@ti.com>
Configuration in vexpress and u8500.v1 is different from what
is needed in u8500.v2. As such, card configuration specifics need
to reside in the board file rather than the driver.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
Register mapping has changed on power control chip between
the first and second revision.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
Functions such as providing power to the MMC device and reading
the processor version register should be in the cpu area for
access by multiple u8500-based boards.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Tom Rini <trini@ti.com>
LAN and GBF need to be powered explicitely, doing so with
interface to AB8500 companion chip.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Enabling timers and clocks in PRCMU and cleaning up mailbox.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
This is to allow the prcmu functions to be used by multiple
u8500-based processors.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: John Rigby <john.rigby@linaro.org>
change the behaviour of switch initialization:
- rename "pwl" to "lan" in hwconfig parameter
"lan" = port 1 with phy addr 2
"lmn" = port 2 with phy addr 3
- if we have a valid switch config file in flash, do not
evaluate the settings in the hwconfig "lan" or "lmn"
subcommand.
- if we have no valid switch config file in flash, start
the switch with default values, if we have a "lan" or
a "lmn" hwconfig subcommand. If no "lan" or "lmn" is
found in hwconfig, do nothing with the switch.
Signed-off-by: Heiko Schocher <hs@denx.de>
Also enable the ohci port on hawkboard. These additions result in an
increased u-boot size -- adjust the same accordingly in the board's
config.
Move the usb header for da8xx platforms under arch-davinci.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
The AM335x GP EVM can have one of 8 different profiles selected. Each
profile has a different set of peripherals and requires different pinmux
configurations that conflict with other profiles. i2c1 is an example of
a conflicted mux currently.
Signed-off-by: Tom Rini <trini@ti.com>
Fix build failure due the move of mx28 code to 'mxs' SoC.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
This gets us rid of duplication of the same file.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
This adds support for Bluegiga APX4 Development Kit. It is built around
Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC,
RTC and USB. APX4 has only one ethernet port.
Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Cc: Stefano Babic <sbabic@denx.de>
This adds support for the AT91SAM9G20 boards by taskit GmbH.
Both boards, Stamp9G20 and PortuxG20, are integrated in one
file. PortuxG20 is basically a SBC built around the Stamp9G20.
Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.deve@googlemail.com>
Add at91sam9x5ek board support, this board support the following SoCs
AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35
Using at91sam9x5ek_nandflash to configure for the board
Now only supports NAND with software ECC boot up
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[move MAINTAINERS entry to right place]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The total RAM size of the IGEP-based boards is 512MiB not 1GiB, the
LPDDR memory consist on two dies of 256MiB.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
- Move definition of the EEPROM contents to <asm/arch/sys_proto.h>
- Make some defines a little less generic now.
- Pinmux must be done by done by SPL now.
- Create 3 pinmux functions, uart0, i2c0 and board.
- Add pinmux specific to Starter Kit EVM for MMC now.
Signed-off-by: Tom Rini <trini@ti.com>
- Board requires gpio0 #7 to be set to power DDR3.
- Board uses DDR3, add a way to determine which DDR type to call
config_ddr with.
- Both of the above require filling in the header structure early, move
it into the data section.
Signed-off-by: Tom Rini <trini@ti.com>
The intention has always been (and boards are to support) an i2c EEPROM
that will identify what hardware they are, allowing a single binary to
support multiple boards. As such, remove the 'evm.c' file as there is
nothing EVM centric in it currently, only SoC peripheral configuration.
Signed-off-by: Tom Rini <trini@ti.com>
This patch adds SPL support for IGEP-based boards.
Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
IGEP-based boards can have two different flash memories, a OneNAND or a
NAND device. Add a configuration option for to choose which memory to use.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
This patch adds board-specific initialization for CPSW on
TI AM335X based boards. Tested on BeagleBone.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split board-specific part into separate patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Read the on-board EEPROM during startup to detect the version
of the board we are running on (as for now only BeagleBone vs
EVM detection is supported).
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
This patch adds pin mux settings for CPSW switch found on
TI AM335X based boards (MII and RGMII modes).
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split pinmux into separate patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Though Commit id a3f88293dd (da850evm:
setup the NAND flash timings) has configured the AEMIF timings, they
are not exactly in sync with the timings used in Linux. Linux is
configuring the timing register as 0x08222204, where as currently it
configured to 0x00100084 in U-Boot. This issue was found out when
support for NAND SPL is added in U-Boot. Without this patch U-Boot
does not come up with SPL.
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for
MMC and NOR to work on DA850/OMAP-L138 Rev.3 EVM. When
GP0[11] is low, the SD0 interface will not work, but NOR
flash will. When GP0[11] is high, SD0 will work but NOR
flash will not.
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
This patch adds support for MMC/SD on DA850/OMAP-L138.
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
UART_RESET, UART_CLK_RUNNING_MASK, and UART_SMART_IDLE_EN
are defined inn evm.c but not used. Also removes unnecessary
include of serial.h
PHYS_DRAM_1_SIZE is defined in am335x_evm.h but never used.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Fix the comment to reflect the actual function call time.
Change the printf message to look nicer in the context it might be printed.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Parameters used for configuring certain SoC peripherals are parsed
from the cfg file and appended as part of the ais image's header. The
u-boot-spl.ais generated is flashed separately to the nand, so do not
delete the file after generation of u-boot.ais.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
This patch moves all bootcount implementations into a common
directory: drivers/bootcount. The generic bootcount driver
is now usable not only by powerpc platforms, but others as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Manfred Rudigier <manfred.rudigier@omicron.at>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
Tested-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Remove old o2dnt board without OF support. New support for this board
is added by the previous patch, O2I configuration.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add common code for o2dnt and o2dnt2 based boards and add different
board configuration files for O2D, O2I, O2DNT2, O2D300, O2MNT and
O3DNT boards.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
LAW init is skipped in the SPL payload because it's assumed that the SPL
has taken care of it -- so make sure the SPL loads all the LAWs as is
done on other boards.
This bug was introduced by:
commit 4589728e21
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Fri Nov 11 08:14:53 2011 -0600
powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
LAW entries not needed during SPL phase.
Signed-off-by: Scott Wood <scottwood@freescale.com>
The P3060 was cancelled before it went into production, so there's no point
in supporting it.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
enum board_slots contained six values, where SLOT1 == 1, SLOT2 == 2, and
so on. This is pointless, so remove it. Also move the lane_to_slot[]
array to the top of the file so that it can be used by other functions.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
In order to figure out which SerDes lane a given Fman port is connected
to, we need a function that maps the fm_port namespace to the srds_prtcl
namespace.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Using the raw value of 0x80000000 directly in the code can
lead to "count the zeros" bugs like that fixed in commit
718e9d13b98 ("MPC85xxCDS: Fix missing LCRR_DBYP bits for
66-133MHz LBC")
Change all existing raw values to use the symbolic value of
LCRR_DBYP instead.
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
There was an extra 0 in front of the value we were using to mask,
remove it to improve the code.
Also fix the value written to ddr_sdram_cfg to set the bus width
properly to 16 bits
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Provides a tool to build boot Image for PBL(Pre boot loader) which is
used on Freescale CoreNet SoCs, PBL can be used to load some instructions
and/or data for pre-initialization. The default output image is u-boot.pbl,
for more details please refer to doc/README.pblimage.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
When boot from PCIE, slave's core should be in holdoff after powered on for
some specific requirements. Master will release the slave's core at the
right time by PCIE interface.
Slave's ucode and ENV can be stored in master's memory space, then slave
can fetch them through PCIE interface. For the corenet platform, ucode is
for Fman.
NOTE: Because the slave can not erase, write master's NOR flash by
PCIE interface, so it can not modify the ENV parameters stored
in master's NOR flash using "saveenv" or other commands.
environment and requirement:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image is in master NOR flash.
3. Put the slave's ucode and ENV into it's own memory space.
4. Normally boot from local NOR flash.
5. Configure PCIE system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to one PCIE interface by RCW.
3. RCW should configure the SerDes, PCIE interfaces correctly.
4. Must set all the cores in holdoff by RCW.
5. Must be powered on before master's boot.
For the slave module, need to finish these processes:
1. Set the boot location to one PCIE interface by RCW.
2. Set a specific TLB entry for the boot process.
3. Set a LAW entry with the TargetID of one PCIE for the boot.
4. Set a specific TLB entry in order to fetch ucode and ENV from
master.
5. Set a LAW entry with the TargetID one of the PCIE ports for
ucode and ENV.
6. Slave's u-boot image should be generated specifically by
make xxxx_SRIO_PCIE_BOOT_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
In addition, the processes are very similar between boot from SRIO and
boot from PCIE. Some configurations like the address spaces can be set to
the same. So the module of boot from PCIE was added based on the existing
module of boot from SRIO, and the following changes were needed:
1. Updated the README.srio-boot-corenet to add descriptions about
boot from PCIE, and change the name to
README.srio-pcie-boot-corenet.
2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to
"xxxx_SRIO_PCIE_BOOT", and the image builded with
"xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and
from PCIE.
3. Updated other macros and documents if needed to add information
about boot from PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
When compile the slave image for boot from SRIO, no longer need to
specify which SRIO port it will boot from. The code will get this
information from RCW and then finishes corresponding configurations.
This has the following advantages:
1. No longer need to rebuild an image when change the SRIO port for
boot from SRIO, just rewrite the new RCW with selected port,
then the code will get the port information by reading new RCW.
2. It will be easier to support other boot location options, for
example, boot from PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The lb60 board accesses the clkgr register, which is 32bit via
16bit IO ops. This causes malfunction. Fix this.
qi_lb60.c: In function ‘cpm_init’:
qi_lb60.c:72:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
qi_lb60.c:84:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel <zpxu@ingenic.cn>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
PHYs on SGMII riser card are used in SGMII mode with different external
IRQs from eTSEC. This means in SGMII mode phy-handle and phy-connection-type
under ethernet node should be updated. Otherwise the PHY interrupt can not
be handled therefor PHY link state change can not be auto detected.
For we have seperate SGMII PHY nodes, ethernet PHY reg fixup is not needed
but it's still be kept to guarantee the sgmii mode could work with old
device tree.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Lane muxing on p2041 is controlled by a reg in CPLD, offset of this reg
is 0xc, CPLD supports SATA by default, we should re-configure the lane
muxing according to RCW, which indicates what SerDes protocol it is running.
Default lane muxing map is as below:
Lane G on bank1 routes to SGMII, controlled by bit 1 of the reg;
Lane A on bank2 routes to AURORA, controlled by bit 0 of the reg;
Lane C/D on bank2 routes to SATA0 and SATA1, controlled by bit 2
and bit 3 respectively.
Default value of these bits for lane muxing is '1', we should set or clear
these bits accoring to RCW.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
In order for indirect mode on the PIXIS to work properly, both chip selects
need to be set to GPCM mode, otherwise writes to the chip select base
addresses will not actually post to the local bus -- they'll go to the
NAND controller instead. Therefore, we need to set BR0 and BR1 to GPCM
mode before switching to indirect mode.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add TLB mappings, board target options, and configuration items
need for SPI/SD boot.
Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit
address flash, therefore, when SDHC/ESPI booting and access to eLBC,
the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to
00b for them.
Configure the PX_BRDCFG0[0~1] to 10b which is connected to
SPI devices as SPI_CS(0:3)_B.
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch adds SDRAM detection feature to km82xx boards.
To enable this feature, define CONFIG_SYS_SDRAM_LIST as the initializer
for an array of struct sdram_conf_s.
These structs will expose the bitfields within registers PSDMR and OR1 which
have to be different between configurations; common bitfields will be
defined, as usual, within CONFIG_SYS_PSDMR and CONFIG_SYS_OR1.
If CONFIG_SYS_SDRAM_LIST is not defined, then the usual behavior is retained.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
* 'master' of git://git.denx.de/u-boot-i2c:
km/common: remove printfs for i2c deblocking code
CONFIG: SMDK5250: I2C: Enable I2C
I2C: Add support for Multi channel
I2C: Modify the I2C driver for EXYNOS5
I2C: Move struct s3c24x0_i2c to a common place.
EXYNOS: PINMUX: Add pinmux support for I2C
EXYNOS5: define EXYNOS5_I2C_SPACING
EXYNOS: Add I2C base address.
EXYNOS: CLK: Add i2c clock
mx6qsabrelite: add i2c multi-bus support
imx-common: add i2c.c for bus recovery support
i.mx53: add definition for I2C3_BASE_ADDR
i.mx: iomux-v3.c: move to imx-common directory
i.mx: iomux-v3.h: move to imx-common include directory
iomux-v3: remove include of mx6x_pins.h
mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support
mxc_i2c: add bus recovery support
mxc_i2c: prep work for multiple busses support
mxc_i2c: add i2c_regs argument to i2c_imx_stop
mxc_i2c: add retries
mxc_i2c: check for arbitration lost
mxc_i2c: change slave addr if conflicts with destination.
mxc_i2c: don't disable controller after every transaction
mxc_i2c: place i2c_reset code inline
mxc_i2c: place imx_start code inline
mxc_i2c: remove redundant read
mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into wait_for_sr_state
mxc_i2c.c: code i2c_probe as a 0 length i2c_write
mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write
mxc_i2c: create i2c_init_transfer
mxc_i2c: clear i2sr before waiting for bit
mxc_i2c: create tx_byte function
mxc_i2c: remove ifdef of CONFIG_HARD_I2C
mxc_i2c: fix i2c_imx_stop
i2c: deblock i2c bus also if accessed before realocation
Signed-off-by: Wolfgang Denk <wd@denx.de>
* 'master' of git://git.denx.de/u-boot-microblaze:
microblaze: Wire up SPI driver
spi: microblaze: Adds driver for Xilinx SPI controller
microblaze: intc: Clear interrupt code
microblaze: Call serial multi initialization
microblaze: Move __udelay implementation
microblaze: Remove extern from board.c
microblaze: Wire up dts configuration
fdt: Add board specific dts inclusion
microblaze: Move individual board linker scripts to common script in cpu tree.
microblaze: Add gpio.h
microblaze: Add missing undefs for UBI and UBIFS
microblaze: Expand and correct configuration comments
microblaze: Enable ubi support
microblaze: Avoid compile error on systems without cfi flash
microblaze: Remove wrong define CONFIG_SYS_FLASH_PROTECTION
Conflicts:
drivers/spi/Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
This code will also be used before reallocation and during this time we
are not allowed to do these printings.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Acked-by: Heiko Schocher <hs@denx.de>
This enables I2C support on smdk5250.
Pinmux setting moved to board file to avoid repeated setting of
gpio lines.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
* 'next' of git://git.denx.de/u-boot:
MPC8xx: Fixup warning in arch/powerpc/cpu/mpc8xx/cpu.c
doc: cleanup - move board READMEs into respective board directories
net: sh_eth: add support for SH7757's GETHER
net: sh_eth: modify the definitions of regsiter
net: sh_eth: add SH_ETH_TYPE_ condition
net: sh_eth: clean up for the SH7757's code
net: fec_mxc: Fix MDC for xMII
net: fec_mxc: Fix setting of RCR for xMII
net: nfs: make NFS_TIMEOUT configurable
net: Inline the new eth_setenv_enetaddr_by_index function
net: allow setting env enetaddr from net device setting
net/designware: Consecutive writes to the same register to be avoided
CACHE: net: asix: Fix asix driver to work with data cache on
net: phy: micrel: make ksz9021 phy accessible
net: abort network initialization if the PHY driver fails
phylib: phy_startup() should return an error code on failure
net: tftp: fix type of block arg to store_block
Signed-off-by: Wolfgang Denk <wd@denx.de>
Also drop a few files referring to no longer / not yet supported
boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Jason Jin <jason.jin@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
This fixes:
cmd_bc3450.c:55:0: warning: "CONFIG_SYS_CPU" redefined [enabled by default]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
In commit 1a89a217f5 we moved most of the
required pads and mux data for USB to the essential list so that later
on we could NOT enable anything that wasn't essential unless otherwise
configured. This was however missing a few pandaboard-specific parts
which left for example USB ethernet non-functional.
Tested this on OMAP4430 ES2.2, OMAP4460 ES1.1 PANDA boards.
(Reworded by Tom Rini to be more precise about what the problem was)
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Tested-by: Gary Thomas <gary@mlbassoc.com>
Tested-by: Tom Rini <trini@ti.com>
Add I2C support.
Tested by placing a 24LC16 EEPROM into the U50 slot which comes empty from factory.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
- enable OF control and embedded OF
- set default device tree file name to 'microblaze'
- add CPP to dtc proxy: board/xilinx/dts/microblaze.dts
- add an empty but processable dts for microblaze-generic
Signed-off-by: Stephan Linz <linz@li-pro.net>
When Trimslice is booted from serial flash, the boot ROM does this, so
U-Boot doesn't need to. However, booting from the SD slot for recovery
purposes, the boot ROM does not set up the pinmux for serial flash. Add
code to U-Boot to set this up, so that an SD-based recovery U-Boot image
can upgrade the U-Boot in serial flash.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Boards can override this to set up the pinmux correctly to access serial
flash.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Missed some boards after my tegra2_mmc.* -> tegra_mmc.* change, and
one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC
AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
GPIO PI6 can be used to obtain the write-protect status of an SD card
inserted into the SD slot.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The PI4 GPIO is used on Tamonten to reset carrier board peripherals.
Power sequencing hardware on the carrier pulls the reset low before
powering up the Tegra, and the CPU is supposed to signal readiness,
and therefore bring peripherals out of reset by pulling PI4 high.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The new gpio_early_init() function, which does nothing by default, can
be overridden by boards to configure GPIOs at an early stage.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Device tree support is required for working USB host support, which in
turn enables ethernet support.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Device tree support is required for working USB host support, which in
turn enables ethernet support.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit uses the common Tegra board implementation instead of
duplicating a lot of the code. In addition, the Plutux and Medcom
specific board files can be removed as the MMC/SD setup is common
among all Tamonten-based boards.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
* 'master' of git://git.denx.de/u-boot-arm: (212 commits)
ARM: cache: Move the cp15 CR register read before flushing the cache.
ARM: introduce arch_early_init_r()
PXA: Enable CONFIG_PREBOOT on zipitz2
ARM: mx28: Remove CONFIG_ARCH_CPU_INIT
No need to define CONFIG_ARCH_CPU_INIT.
add new board vl_ma2sc
MTD: SPEAr SMI: Add write support for length < 4 bytes
i2c: designware_i2c.c: Add support for the "i2c probe" command
rtc/m41t62: Add support for M41T82 with HT (Halt Update)
SPL: ARM: spear: Add SPL support for SPEAr600 platform
Makefile: Add u-boot.spr build target (SPEAr)
SPL: ARM: spear: Remove some objects from SPL build
SPL: lib/Makefile: Add crc32.c to SPL build
SPL: common/Makefile: Add image.c to SPL build
arm: Don't use printf() in SPL builds
GPIO: Add SPEAr GPIO driver
net: Multiple updates/enhancements to designware.c
cleanup/SPEAr: Define configuration flags more elegantly
cleanup/SPEAr: Remove unnecessary parenthesis
SPEAr: Correct SoC ID offset in misc configuration space
SPEAr: explicitly select clk src for UART
SPEAr: Remove CONFIG_MTD_NAND_VERIFY_WRITE to speed up NAND access
SPEAr: Enable ONFI nand flash detection for spear3xx and 6xx and evb
SPEAr: Enable CONFIG_SYS_FLASH_EMPTY_INFO macro
SPEAr: Correct the definition of CONFIG_SYS_MONITOR_BASE
SPEAr: Enable CONFIG_SYS_FLASH_PROTECTION
SPEAr: Enable dcache for fast file transfer
SPEAr: Enable autoneg for ethernet
SPEAr: Enable udc and usb-console support only for usbtty configuration
SPEAr: Enable usb device high speed support
SPEAr: Initialize SNOR in early_board_init_f
SPEAr: Change the default environment variables
SPEAr: Remove unused flag (CONFIG_SYS_HZ_CLOCK)
SPEAr: Add configuration options for spear3xx and spear6xx boards
SPEAr: Add basic arch related support for SPEAr SoCs
SPEAr: Add interface information in initialization
SPEAr: Add macb driver support for spear310 and spear320
SPEAr: Configure network support for spear SoCs
SPEAr: Place ethaddr write and read within CONFIG_CMD_NET
SPEAr: Eliminate dependency on Xloader table
SPEAr: Fix ARM relocation support
st_smi: Fixed page size for Winbond W25Q128FV flash
st_smi: Change timeout loop implementation
st_smi: Fix bug in flash_print_info()
st_smi: Change the flash probing method
st_smi: Removed no needed dependency on ST_M25Pxx_ID
st_smi: Fix smi read status
st_smi: Move status register read before modifying ctrl register
st_smi: Read status until timeout happens
st_smi: Enhance the error handling
st_smi: Change SMI timeout values
st_smi: Return error in case TFF is not set
st_smi: Add support for SPEAr SMI driver
mtd/NAND: Remove obsolete SPEAr specific NAND drivers
SPEAr: Configure FSMC driver for NAND interface
mtd/NAND: Add FSMC driver support
arm/km: remove calls to kw_gpio_* in board_early_init_f
arm/km: add implementation for read_dip_switch
arm/km: support the 2 PCIe fpga resets
arm/km: skip FPGA config when already configured
arm/km: redefine piggy 4 reg names to avoid conflicts
arm/km: cleanup km_kirkwood boards
arm/km: enable BOCO2 FPGA download support
arm/km: remove portl2.h and use km_kirkwood instead
arm/km: convert mgcoge3un target to km_kirkwood
arm/km: add kmcoge5un board support
arm/km: add kmnusa board support
arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0
cm-t35: fix incorrect NAND_ECC layout selection
ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls.
ARM: OMAP4/5: Move USB pads to essential list.
ARM: OMAP4/5: Move USB clocks to essential group.
ARM: OMAP4/5: Move gpmc clocks to essential group.
ARM: OMAP4+: Move external phy initialisations to arch specific place.
omap4: Use a smaller M,N couple for IVA DPLL
da850/omap-l138: Enable auto negotiation in RMII mode
omap: am33xx: accomodate input clocks other than 24 Mhz
omap: emif: fix bug in manufacturer code test
omap: emif: deal with rams that return duplicate mr data on all byte lanes
OMAP4+: Force DDR in self-refresh after warm reset
OMAP4+: Handle sdram init after warm reset
ARM: OMAP3+: Detect reset type
arm: bugfix: Move vector table before jumping relocated code
Kirkwood: Add support for Ka-Ro TK71
arm/km: use spi claim bus to switch between SPI and NAND
arm/kirkwood: protect the ENV_SPI #defines
ARM: don't probe PHY address for LaCie boards
lacie_kw: fix CONFIG_SYS_KWD_CONFIG for inetspace_v2
lacie_kw: fix SDRAM banks number for net2big_v2
Kirkwood: add lschlv2 and lsxhl board support
net: add helper to generate random mac address
net: use common rand()/srand() functions
lib: add rand() function
kwboot: boot kirkwood SoCs over a serial link
kw_spi: add weak functions board_spi_claim/release_bus
kw_spi: support spi_claim/release_bus functions
kw_spi: backup and reset the MPP of the chosen CS pin
kirkwood: fix calls to kirkwood_mpp_conf
kirkwood: add save functionality kirkwood_mpp_conf function
km_arm: use filesize for erase in update command
arm/km: enable mii cmd
arm/km: remove CONFIG_RESET_PHY_R
arm/km: change maintainer for mgcoge3un
arm/km: fix wrong comment in SDRAM config for mgcoge3un
arm/km: use ARRAY_SIZE macro
arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE
arm/km: add piggy mac adress offset for mgcoge3un
arm/km: add board type to boards.cfg
AT91SAM9*: Change kernel address in dataflash to match u-boot's size
ATMEL/PIO: Enable new feature of PIO on Atmel device
ehci-atmel: fix compiler warning
AT91: at91sam9m10g45ek : Enable EHCI instead OHCI
Atmel : usb : add EHCI driver for Atmel SoC
Fix: AT91SAM9263 nor flash usage
Fix: broken boot message at serial line on AT91SAM9263-EK board
i.MX6 USDHC: Use the ESDHC clock
mx28evk: Fix boot by adjusting HW_DRAM_CTL29 register
i.MX28: Add function to adjust memory parameters
mx28evk: Fix PSWITCH key position
mx53smd: Remove CONFIG_SYS_I2C_SLAVE definition
mx53loco: Remove CONFIG_SYS_I2C_SLAVE definition
mx53evk: Remove CONFIG_SYS_I2C_SLAVE definition
mx53ard: Remove CONFIG_SYS_I2C_SLAVE definition
mx35pdk: Remove CONFIG_SYS_I2C_SLAVE definition
imx31_phycore: Remove CONFIG_SYS_I2C_SLAVE definition
mx53ard: Remove unused CONFIG_MII_GASKET
mx6: Avoid writing to read-only bits in imximage.cfg
m28evk: use same notation to alloc the 128kB stack
...
Signed-off-by: Wolfgang Denk <wd@denx.de>
* add support for board VL+MA2SC
* adds vl_ma2sc_config for standard NOR boot configuration
* adds vl_ma2sc_ram_config for RAM load configuration
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
Enable data cache with 1:1 mapping of DDR to enable fast file
transfer over tty which was doing lot of copy.
This feature is enabled only for flashing operation i.e. when
CONFIG_SPEAR_USBTTY is enabled.
This has been tested on SPEAr320, SPEAr600 and SPEAr900 evaluation
boards.
Following figures show an estimate on the performance improvements. The
test setup was a Linux host (not Windows) and involved measurement of
only binary transfer time, through kermit. The flash erase and flash
copy time would be unaffected by these patches.
Another thing is this that the timings remained more or less same across
ARM9 and Cortex based devices, hence reporting only one of the cases.
Before Enhancements
===================
$ time ukermit.small -p /dev/ttyACM0 -f spear320_uImage.img
Downloading file: 100.00% completed(2014080/2014080 bytes)
real 0m41.228s
user 0m0.002s
sys 0m0.064s
After Enhancements
==================
$ time ukermit.large -p /dev/ttyACM0 -f spear320_uImage.img
Downloading file: 100.00% completed(2014080/2014080 bytes)
real 0m5.441s
user 0m0.001s
sys 0m0.001s
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
flash reading is required earlier than flash_init is called since the env_init
is called before flash_init. This makes the smi_init necessary before env_init
being called.
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds options for all the below mentioned configurations and
subsequently renames the include/configs/spearxxx.h files to spear3xx_evb.h,
spear6xx_evb.h etc to depict evaluation board configuration.
SPEAr3xx and SPEAr6xx boards can be compiled in following configurations
1. Environment placed in NAND
2. Console on usb device
3. Console on usb device with environment placed in NAND
4. SPEAr310 and SPEAr320 support environment variables in parallel
NOR flash.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Few Designware peripheral registers need to be modified based on the
ethernet interface selected by the board. This patch supports interface
information in ethernet driver
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
SPEAr310 and SPEAr320 SoCs have an extra ethernet controller. The
driver for this device is already supported by u-boot, so configuring
board configuration file and defining base addresses etc to make use
of the common driver
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
ethaddr can be optionally read from i2c memory. So, chip_config command supports
reading/writing hw mac id into i2c memory. Placing this code within
CONFIG_CMD_NET as this would only be needed when network interface is configured
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Xloader table was used primarily to inform u-boot about the DDR size. However,
now the ddr size is calculated at runtime which eliminates any need for the
Xloader table. So removing this unnecessary code.
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
While the u-boot code is running from the flash, it is essential that no access
is made to the bss segment. This is due to the fact that .rel.dyn and .bss areas
overlap and former contains information used in relocation. In SPEAr, this was
not taken into consideration. As a result, while the relocation wasn't complete,
dram_init populated an uninitialized global variable resulting in corruption of
.rel.dyn area, which resulted in u-boot crash.
This commit fixes this problem by removing code that accesses bss segment
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Since FSMC is a standard IP and it supports different memory interfaces, it
is supported independent of spear platform and spear is configured to use that
driver for interfacing with the NAND device
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
These functions tried to access two static tables before relocation
(board_early_init_f is executed before relocation). But these static
tables lie in the bss section which is not valid before relocation.
These accesses then overwrote some parts of u-boot binary before it was
relocated. For the kmnusa build, this results in a corrupted important
env variable (bootcmd) but it may be that some other parts of the u-boot
binary are corrupted.
This patch solves this problem by moving all the kw_gpio_* calls to
board_init, which should be early enough in the boot sequence. The only
calls that could not be moved is the one for the SOFT (bitbang) I2C, and
they have been replaced by a direct access to the GPIO dataout Control
register to set the two GPIOs as output.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Add a function to read the dip_switch on kmcoge5un. If the
switch is set the actual_bank is set to 0 and this SW is
booted.
Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
The PCIe FPGAs now have to support 2 resets: one for the non traffic
affecting part (PCIe) and one for the traffic affecting part.
When the FPGA is not reconfigured, we only reset the PCIe part.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
In order to be able to perform board resets without interrupting the
traffic, the configuration of an already properly configured FPGA is
skipped.
This is because some PCIe FPGAs embed some other function that must
continue to work over reset.
It is then the responsibility of the application to trigger a
reconfiguration when needed. This is done by lowering the FPGA_INIT_B
pin for delaying the configuration to u-boot @ next reboot, and then
lower the FPGA_PROGRAM_B signal.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Some very similar #defines for reg addresses are used in a later patch
(managed_switch support for km_arm).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
This adds a first support of the FPGA download for a PCIe FPGA based
on the BOCO2 CPLD.
This takes place in 3 steps, all done accessing the SPICTRL reg of the
BOCO2:
1) start the FPGA config with an access to the FPGA_PROG bit
2) later in the boot sequence, wait for the FPGA_DONE bit to toggle to 1
for the end of the FPGA configuration (with a timeout)
3) reset the FPGA
4) finally remove the access to its config EEPROM from the FPGA so that
the CPU can update the FPGA configuration when the kernel is running
The boards with a PCIe FPGA but without BOCO2 still are supported.
The config option name is CONFIG_KM_FPGA_CONFIG
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
The additional headerfile is unneeded here, we can use the generic
km_kirkwood.h instead. And we can use the better config option
KM_PIGGY4_88E6061 for the specific features for boards with this
design in km_arm.c.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Use the generic header km_kirkwood.h and get rid of the
board specific header.
changes for v2: rebased because of changes in other patches
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
For u-boot this board is similar to mgcoge3un. But some differences
are present. We have a different SDRAM on it and therefore a new
SDRAM config file. Additionaly this board has a direct MAC/MAC
connection from the kirkwood to a marvell simple switch without a
phy inbetween, this needs a new configuration for the mvgbe driver.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
This board is similar to portl2, but it has the u-boot environment
in a SPI NOR flash and not in an i2c eeprom like portl2 have.
Some other details:
- IVM EEPROM is at adress: pca9547:70:9
- PCI is enabled
- PIGGY4 is connected via MV88E6352 simple switch. There is no phy
between the simple switch and the kirkwood.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
USB module pads are getting enabled under non-essential
group. These will be required for fastboot, tftp support.
So move this to essential list to have them working when
non-essential pads are no more muxed.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
We overwrite these weak functions from the kirkwood spi code to
use our own method to be able to switch between the SPI NOR and
the NAND flash. This is needed e.g. to update the u-boot. The former
command do_spi_toggle can therefore be removed. And the usage of
this command is removed from the u-boot update command in the
u-boot environment.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
The command miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr) always
returns 8 for the PHY address. It is the reset value for the PHY
Address Register. Obviously, this default value could be incorrect.
Moreover, as the PHY address is well known, there is no need to
auto-detect it.
Now, the PHY address must given as a parameter to the PHY initialization
function. Additionally this patch also fixes some aesthetic issues.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
This patch adds support for both the Linkstation Live (LS-CHLv2) and
Linkstation Pro (LS-XHL) by Buffalo.
Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
With the new second save argument introduced by the previous patch, all
the calls to the function had to be fixed.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
On at91sam platforms, u-boot grew larger than the allocated size in
dataflash, the layout was:
bootstrap 0x00000000
ubootenv 0x00004200
uboot 0x00008400
kernel 0x00042000
fs 0x00252000
u-boot with the defconfig doesn't seem to fit in 0x42000 - 0x8400 =
0x39C00 bytes anymore.
Now, the layout is:
bootstrap 0x00000000
ubootenv 0x00004200
uboot 0x00008400
kernel 0x00084000
fs 0x00294000
Signed-off-by: Alexandre Belloni <alexandre.belloni@piout.net>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
There is no .S file in this directory, so just remove SOBJS.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
There is no .S file in this directory, so just remove SOBJS.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
There is no .S file in this directory, so just remove SOBJS.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
There is no .S file in this directory, so just remove SOBJS.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
There is no .S file in this directory, so just remove SOBJS.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Original code was assuming that the fuse revision version for all mx53loco boards
based on Dialog PMIC was the same, which is not the case.
Force the revision of all Dialog-based boards to 0.
This fixes a kernel crash when PMIC is accessed in the 2.6.35 kernel
for Dialog rev E boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Use the pinmux configuration function for SMDK5250.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
In the MAX8997, LDO regulators needs to preserve previously set voltage
values.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
panel_info data structure is gloable variable, so, I have initialized it
in board file. If it is initialized in init_panel_info() like existing,
it can't be used in drv_lcd_init() in common/lcd.c because
init_panel_info() is called after drv_lcd_init().
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Buffer the PCB revision to avoid multiple eeprom accesses
for the same data and print it as a part of board information.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tom Rini <trini@ti.com>
Legacy eeprom layout represents the revision number syntactically
(i.e. revision 1.00 is written as 0x100). This is inconsistent with
the representation in newer layouts, where it is defined semantically
(i.e. 0x64).
This patch fixes the issue by replacing the syntactic representation
with the semantic one.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Non-legacy layouts have an extended revision field,
but only the first 2 bytes are the PCB revision.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
- change gpio pin settings:
- gpio pin 6[13] (PLC reset) default value low
- gpio pin 6[0] (TPM reset) default value low
- 4 new GPIO pins
pin i/o name
- 3[9] input Board Type
- 2[7] input HW-ID0
- 2[6] input HW-ID1
- 2[3] input HW-ID2
- read board type and hw id from gpio pins on the enbw_cmc board,
and use board type for setting up different gpio pin settings.
- do not pass "davinci_mmc.use_dma=0" to linux, as MMC now
works with DMA.
- update logbuf support:
store post word in RTC scratch register
- add support for configuring KSZ8864RMN switch through
a config file on u-boot startup. For more infos see:
doc/README.switch_config
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Fix the .dts file USB unit addresses not to duplicate each-other.
Fix the board name string to indicate the vendor is Compulab not NVIDIA.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
In anticipation of Tegra3 support, continue removing/renaming
Tegra2-specific files. No functional changes (yet).
Updated copyrights to 2012.
Signed-off-by: Tom Warren <twarren@nvidia.com>
In anticipation of Tegra3 support, start removing/renaming
Tegra2-specific files. No functional changes (yet).
Also updated copyright to 2012.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add a device tree for Ventana; the Seaboard file no longer represents
the HW present on Ventana.
Enable USB on Ventana.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
... to enable USB host support, which enables Ethernet support.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
... to enable USB host support, which enables Ethernet support.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Whistler is a highly configurable Tegra evaluation and development board.
This change adds support for the following specific configuration:
E1120 motherboard
E1108 CPU board
E1116 PMU board
The motherboard configuration switches are set as follows:
SW1=0 SW2=0 SW3=5
S1/S2/S3/S4 all on, except S3 7/8 are off.
Other combinations of daugher boards may work to varying degrees, but will
likely require some SW adjustment.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass's proposal to fix this on Seaboard was NAK'd, so I
removed his NS16550 references and added a small delay before
SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes
and saw no corruption (crc's matched) and no spurious comm chars.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
We don't care E bit of SVR in most cases. Clear E bit for SVR_SOC_VER().
This will simplify the coding. Use IS_E_PROCESSOR() to identify SoC with
encryption. Remove all _E entries from SVR list and CPU list.
Signed-off-by: York Sun <yorksun@freescale.com>
On p1010rdb some signals are muxed for tdm/can/uart/flash.
If we don't set fsl_p1010mux:tdm_can to "can" or "tdm" explicitly,
defaultly we keep spi chip selection to spi-flash instead of to
tdm/slic and disable uart1 when not using flexcan, as well disable sdhc.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
BSC9131RDB is a Freescale reference design board for BSC9131 SoC. BSC9131 SOC
is an integrated device that targets Femto base station market. It combines
Power Architecture e500v2 and DSP StarCore SC3850 core technologies with
MAPLE-B2F baseband acceleration processing elements
BSC9131RDB Overview
-----------------
-1Gbyte DDR3 (on board DDR)
-128Mbyte 2K page size NAND Flash
-256 Kbit M24256 I2C EEPROM
-128 Mbit SPI Flash memory
-USB-ULPI
-eTSEC1: Connected to RGMII PHY
-eTSEC2: Connected to RGMII PHY
-DUART interface: supports one UARTs up to 115200 bps for console display
Apart from the above it also consists various peripherals to support DSP
functionalities.
This patch adds support for mainly Power side functionalities and peripherals
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Akhil Goyal <Akhil.Goyal@freescale.com>
Signed-off-by: Rajan Srivastava <rajan.srivastava@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
The value of ET0_ERXD6 and GPSR1_INIT was wrong.
This fixes them.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Exactly one board has defined CONFIG_SYS_PROMPT_HUSH_PS2 to a value
different than "> " which is vision2. I have Cc'd the maintainer here
as I strongly suspect this is a bug rather than intentional behavior.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Stefano Babic <sbabic@denx.de>
We provide a default table of { 9600, 19200, 38400, 57600, 115200 }
in <config_fallbacks.h> which mkconfig places after <configs/...h> in
the generated config file. This is used when a board has not set its
own table.
Signed-off-by: Tom Rini <trini@ti.com>
If the testpin is asserted, first check if a test_bank
variable is defined before trying to boot this
test_bank.
Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
On kmcoge5ne we have a dip switch present. If this switch
was switched on the actual_bank is set to 0 and this SW
will be booted.
Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
kmcoge5ne starts the post tests if the testpin on
the board was enabled. Currently it does simply a memory
test.
Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Enabled application buffers in uboot to allow application chipselect
access in uboot.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The MAC address begins at offset 1.
Signed-off-by: Thomas Herzmann <thomas.herzmann@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This board is a MPC8360 board. Two flashes are present
a NOR flash were u-boot and the u-boot environment is stored
and a NAND flash for the application code. This board has 512MB
SDRAM.
Additionaly we introduce a common km8360.h file and convert kmeter1 to
use this.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Christian Herzig <christian.herzig@keymile.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
If the ram size isn't locked to 2GiB, the get_ram_size() may hang up.
Signed-off-by: Christian Herzig <christian.herzig@keymile.com>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 'master' of git://git.denx.de/u-boot-video:
video: atmel/lcd: add LCD driver for new Atmel SoC
video: cfb_console: flush dcache for frame buffer in DRAM
cfb_console: Ignore bell character
cfb_console: Add console_clear_line function
cfb_console: Fix function console_back
omap3_dss: cosmetic changes
omap3_dss: add optional framebuffer
mx53loco: Add LCD support
mx5: Rename mx51_fb_init()
mx53: Allow IPUv3 driver to also work on mx53
mx51evk: Add LCD support
EXYNOS: display 32bpp bitmap TIZEN logo
create lib/tizen directory
LCD: display 32bpp decompressed bitmap image
common/lcd.c: reduce one CONFIG_LCD_LOGO ifdef
common/lcd.c: reduce some CONFIG_LCD_*_LOGO ifdefs
common/lcd.c: use ARRAY_SIZE
cmd_bmp.c: make bmp_display() usable by drivers or board code
LCD: support another s6e8ax0 panel type
LCD: change s6e8ax0 panel gamma value
include/video.h: drop unused video_printf()
Signed-off-by: Wolfgang Denk <wd@denx.de>
This is an sh2a device (max 266MHz) with FPU, video display
controller (VDC), 8 serial ports, 4 I2C channels, 3 CAN ports,
SD and on-chip USB.
The RSK2+SH7269 board uses the SH7269 processor. It is often
referred to as just rsk7269.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The AP-SH4A-4A board has SH7734, 64MB DDR2-SDRAM, USB,
Ethernet, and more.
This patch supports the following functions:
- 64MB DDR2-SDRAM
- 16MB NOR Flash memory
- Serial console (SCIF)
- Ethernet (SH-Ether with Gigabit)
- I2C
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This read MAC address from Serial EEPROM and set.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The r0p7734 board has SH7734, 128MB DDR2-SDRAM, USB,
Ethernet, and more.
This patch supports the following functions:
- 128MB DDR2-SDRAM
- 32MB NOR Flash memory
- Serial console (SCIF)
- Ethernet (SH-Ether/SMSC)
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add support for CLAA07LC0ACW LCD that connects to the mx53loco board.
Configure the board to show the Linux logo on the LCD.
Also increase the size of CONFIG_SYS_MALLOC_LEN variable to take into account
the framebuffer usage.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
The ipuv3 driver is currently only used on mx51, but it can be extended to work
on mx53 and mx6 as well.
Rename mx51_fb_init(), so that it can be used by other SoCs.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Add support for CLAA07LC0ACW LCD that connects to the mx51evk board.
Configure the board to show the Linux logo on the LCD.
Also increase the size of CONFIG_SYS_MALLOC_LEN variable to take into account
the framebuffer usage.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
This patch supports drawing 32bpp bitmap TIZEN logo in exynos fb.
"tizen_hd_logo.h" data is compressed from trats_logo.bmp to
trats_logo.bmp.gz by gzip and converted to tizen_hd_logo.h header file
format by some application. The logo data is decompressed in the exynos
fb driver by bmp_display().
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
s6e8ax0 panel has many panel of types. This patch support another panel
on TIZEN lunchbox board(HWREVISION 2). This panel has reversed panel
display type. So, I had added necessary command.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
These are all the files which use the API incorrectly but did not get
built using MAKEALL -a powerpc|arm. I have no compiler for them, but
the remaining issues should be far less than without this patch.
Any outstanding issues are left to the maintainers of boards that use
these drivers.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Some copy/pasted drivers redefine functions
defined in include/net.h. Remove these so that
the definitions can be changed without error.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Fix this:
cpci405.c: In function 'do_get_bpip':
cpci405.c:737:4: warning: format '%ld' expects type 'long int', but argument 3 has type 'IPaddr_t'
cpci405.c:737:4: warning: format '%ld' expects type 'long int', but argument 4 has type 'IPaddr_t'
cpci405.c:737:4: warning: format '%ld' expects type 'long int', but argument 5 has type 'IPaddr_t'
cpci405.c:737:4: warning: format '%ld' expects type 'long int', but argument 6 has type 'IPaddr_t'
cpci405.c:700:8: warning: unused variable 'bd'
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
This field gets read in one place (by "bdinfo"), and we can replace
that with getenv("ipaddr"). After all, the bi_ip_addr field is kept
up-to-date implicitly with the value of the ipaddr env var.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
If uart2 is enabled during boot, spurious wifi chip transmission will
hang the module and it is impossible to recover from this situation
without hard reset. This will prevent any l4_per domain idle
transitions.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Seaboard uses a QUERTY keyboard. We add key codes for this to
enable key scanning to work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This adds timings for T20 and T25 Seaboards, using the bindings found here:
http://patchwork.ozlabs.org/patch/132928/
We supply both full speed options for normal running, and half speed options
for testing / development.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tegra core power rail has leakage voltage around 0.2V while system in
suspend mode. The source of the leakage should be coming from PMC power
detect logic for IO rails power detection.
That can be disabled by writing a '0' to PWR_DET_LATCH followed by writing '0'
to PWR_DET (APBDEV_PMC_PWR_DET_0).
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Call the function to put warmboot boot in a suitable place for resume.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
There is no need to set the VBUS power enable to 0 first and then to 1.
Set it to 1 in the gpio_direction_output() function.
While at it, use the standard naming convention for the GPIO comment.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.
The kernel uses this data to distinguish between Dialog versus mc34708 based boards,
and also to distinguish between revA and revB of the mc34708 based boards.
Suggested-by: Yu Li <yk@magniel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
On the mx53loco board with mc34708 PMIC it is necessary to turn on VUSB regulator
so that the mx53 USBH1 PHY receives the 3.3V voltage.
Tested by inserting a USB pen drive in the upper USB slot (USBH1) and then issued the
commands:
usb start
usb info
,which correctly detected and printed the USB pen drive information.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Add mc34708 support and set mx53 core frequency at its maximum value of 1GHz.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
As mx53loco board has two variants: one with Dialog PMIC and another with FSL MC34708 PMIC,
we need to be able to build both drivers.
Change pmic_init() and PMIC_NUM_OF_REGS names to avoid build conflicts when both drivers are present.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
NAND support is not enabled by default because Eval Kit is not delivered
with NAND chip. To enable NAND support add CONFIG_CMD_NAND to board config.
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Acked-by: Marek Vasut <marex@denx.de>
There are two types of mx53loco boards: initial boards were built with a Dialog
DA9053 PMIC and more recent version is based on a Freescale MC34708 PMIC.
Add DA9053 PMIC support and adjust the required voltages and clocks for running
the CPU at 1GHz.
Tested on both versions of mx53loco boards.
In the case of a MC34708-based board the CPU operating voltage remains at 800MHz.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by : Stefano Babic <sbabic@denx.de>
Print CPU information within board_late_init().
This is in preparation for adding 1GHz support, which requires programming a PMIC
via I2C. As I2C is only available after relocation, print the CPU information
later at board_late_init(), so that the CPU frequency can be printed correctly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Uses the 'magic_keys' idiom as described in doc/README.kbd:
http://lists.denx.de/pipermail/u-boot/2012-April/122502.html
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
There is a 'gpio_direction_output(87, 0);' call previously, so the GPIO direction is
already established.
Use gpio_set_value() for changing the GPIO output then.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
The ESG ima3-mx53 board is based on the Freescale
i.MX53 SOC. It boots from NOR (128 MB) and
supports Ethernet (FEC), SATA.
Signed-off-by: Stefano Babic <sbabic@denx.de>
vl_bpix of vidinfo_t was changed proper value for u-boot.
It is used to multiple of 2 by using NBITS() macro.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch support TRATS board configuration and display function.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
this patch fixed following warning.
tzpc_init.c: In function 'tzpc_init':
tzpc_init.c:35: warning: assignment from incompatible pointer type
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Chander Kashyap <chander.kashyap@linaro.org>
This patch enables LDO4 power line for preparing proper voltages to be
measured by ADC converter.
This measurement is used for determination of target board HW revision.
Test HW:
Universal_C210 (Exynos4210) rev. 0.0
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
TZPC IP is common across Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to exynos_tzpc will allow generic
usase of tzpc.
Also modify board/samsung/smdk5250/tzpc_init.c to use exynos_tzpc.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
With almost all the architecture and board BOARD_LATE_INIT does not use.
CONFIG_BOARD_LATE_INIT is used instead.
This changed CONFIG_BOARD_LATE_INIT from BOARD_LATE_INIT.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Enable I2C multi-bus support and config I2C muxes for I2C2 and I2C3.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Introduce a __weak misc_init_r function that just runs dieid_num_r().
Remove misc_init_r from cm_t35, mcx, omap3_logic and mt_ventoux as this was
all they did for misc_init_r.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Peter Barada <peter.barada@logicpd.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Update pandora's GPIO setup code with these changes:
- convert to gpiolib
- set up dual voltage GPIOs to match supply of 1.8V by clearing VMODE1
- add GPIO_IO_PWRDNZ configuration for DM3730 variation of pandora
(required to enable GPIO 126, 127, and 129 I/O cells in DM3730)
- add wifi reset pulse as recommended by wifi chip's manufacturer
- drop configuration of GPIOs that u-boot doesn't need
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
This is rework on config files of IGEP-based boards with the aim to remove
duplicated code to be more maintainable. Basically this patch creates a
common configuration file for both boards and only sets the specific option
in the board config file.
On board files the hardcored mach type was replaced in favour of using the
CONFIG_MACH_TYPE option.
More than 200 duplicated lines have been deleted.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
TPS SET0/SET1 register is selected by a GPIO pin on OMAP4460 platforms.
Currently we control this pin with a mux configuration as part of
boot sequence.
Current configuration results in the following voltage waveform:
|---------------| (SET1 default 1.4V)
| --------(programmed voltage)
| <- (This switch happens on mux7,pullup)
vdd_mpu(TPS) -----/ (OPP boot voltage)
--------- (programmed voltage)
vdd_core(TWL6030) -----------------------/ (OPP boot voltage)
Problem 1) |<----- Tx ------>|
timing violation for a duration Tx close to few milliseconds.
Problem 2) voltage of MPU goes beyond spec for even the highest of MPU OPP.
By using GPIO as recommended as standard procedure by TI, the sequence
changes to:
-------- (programmed voltage)
vdd_mpu(TPS) ------------/ (Opp boot voltage)
--------- (programmed voltage)
vdd_core(TWL6030) -------------/ (OPP boot voltage)
NOTE: This does not attempt to address OMAP5 - Aneesh please confirm
Reported-by: Isabelle Gros <i-gros@ti.com>
Reported-by: Jerome Angeloni <j-angeloni@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Add parameters to the OMAP MMC initialization function so the board can
mask host capabilities and set the maximum clock frequency. While the
OMAP supports a certain set of MMC host capabilities, individual boards
may be more restricted and the OMAP may need to be configured to match
the board. The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example.
Signed-off-by: Jonathan Solnit <jsolnit@gmail.com>
This change adds a basic support for Embest/Timll DevKit3250 board,
NOR and UART are the only supported peripherals for a moment. The board
doesn't require low-level init, because the initial SDRAM and GPIO
configuration is performed during kickstart bootloader execution.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
lin_gadget: use common linux/compat.h
linux/compat.h: rename from linux/mtd/compat.h
lin_gadget: use common mdelay
gunzip: rename z{alloc, free} to gz{alloc, free}
fs/fat: align disk buffers on cache line to enable DMA and cache
part_dos: align disk buffers on cache line to enable DMA and cache
* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR
powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
cmd_bdinfo: display the address map size (32-bit vs. 36-bit)
PowerPC: correct the SATA for p1/p2 rdb-pc platform
powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
powerpc/corenet_ds: Slave module for boot from SRIO
powerpc/corenet_ds: Master module for boot from SRIO
powerpc/corenet_ds: Document for the boot from SRIO
powerpc/corenet_ds: Correct the compilation errors about ENV
powerpc/srio: Rewrite the struct ccsr_rio
powerpc/85xx:Fix lds for nand boot debug info
powerpc/p2041rdb: add env in NAND support
powerpc/p2041rdb: add NAND and NAND boot support
powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
powerpc/85xx:Avoid vector table compilation for nand_spl
powerpc/85xx:Fix IVORs addr after vector table relocation
powerpc/85xx:Avoid hardcoded vector address for IVORs
powerpc/p1023rds: Disable nor flash node and enable nand flash node
In hardware revision 1.20 one more fan controller is added to dlvision-10g.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Print fpga info at last_stage_init on gdsys 405ep boards.
Use dtt_init() to startup fans.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
In order to add boards that have different hardware for fpga reset,
any 405ep gdsys board now provides these functions:
void gd405ep_init(void);
void gd405ep_set_fpga_reset(unsigned state);
void gd405ep_setup_hw(void);
int gd405ep_get_fpga_done(unsigned fpga);
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Most 85xx boards can be built as a 32-bit or a 36-bit. Current code sometimes
displays which of these is actually built, but it's inconsistent. This is
especially problematic since the "default" build for a given 85xx board can
be either one, so if you don't see a message, you can't always know which
size is being used. Not only that, but each board includes code that displays
the message, so there is duplication.
The 'bdinfo' command has been updated to display this information, so
we don't need to display it at boot time. The board-specific code is
deleted.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
When boot from SRIO, slave's ucode can be stored in master's memory space,
then slave can fetch the ucode image through SRIO interface. For the
corenet platform, ucode is for Fman.
Master needs to:
1. Put the slave's ucode image into it's own memory space.
2. Set an inbound SRIO window covered slave's ucode stored in master's
memory space.
Slave needs to:
1. Set a specific TLB entry in order to fetch ucode from master.
2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.
The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image in master NOR flash.
3. Normally boot from local NOR flash.
4. Configure SRIO switch system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to SRIO1 or SRIO2 by RCW.
3. RCW should configure the SerDes, SRIO interfaces correctly.
4. Slave must be powered on after master's boot.
5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode
locally.
For the slave module, need to finish these processes:
1. Set the boot location to SRIO1 or SRIO2 by RCW.
2. Set a specific TLB entry for the boot process.
3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot.
4. Slave's u-boot image should be generated specifically by
make xxxx_SRIOBOOT_SLAVE_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
P1010RDB and p1_pc_rdb_pc has incorrect configuration for
CONFIG_DDR_RAW_TIMING. It should be CONFIG_SYS_DDR_RAW_TIMING.
Incorrect setting causes DDR failure in case of SPD absent.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
In the p1023rds, when system boots from nor flash, kernel only accesses nor
flash and can not access nand flash with BR0/OR0; when system boots from
nand flash, kernel only accesses nand flash and can not access nor flash
with BR0/OR0.
Default device tree nor and nand node should have the following structure:
Example:
nor_flash: nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x02000000>;
bank-width = <2>;
device-width = <1>;
status = "okay";
partition@0 {
label = "ramdisk";
reg = <0x00000000 0x01c00000>;
};
}
nand_flash: nand@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,p1023-fcm-nand",
"fsl,elbc-fcm-nand";
reg = <0x2 0x0 0x00040000>;
status = "disabled";
u-boot-nand@0 {
/* This location must not be altered */
/* 1MB for u-boot Bootloader Image */
reg = <0x0 0x00100000>;
read-only;
};
}
When booting from nor flash, the status of nor node is enabled and the
status of nand node is disabled in the default dts file, so do not do
anything.
But, when booting from nand flash, need to do some operations:
o Disable the NOR node by setting status = "disabled";
o Enable the NAND node by setting status = "okay";
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
* 'master' of git://git.denx.de/u-boot-sh:
sh: ecovec: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
sh: Fix rsk7264 pin setup for on-board ethernet
This sets up the external ethernet IRQ pin.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Do the same AXI cache and Qos settings done already in the
SabreLite imximage.cfg for the ARM2 board, too.
It fixes a display flash issue caused by low priority of
the display IDMA channel.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Acked-by: Jason Liu <r64343@freescale.com>
The board revision is detected accessing to the pmic,
that is not available before relocation (I2C).
This generates the following error:
CPU: Freescale i.MX35 rev 2.0 at 532 MHz.
Reset cause: WDOG
<reg num> = 7 is invalid. Should be less than 0
Board: MX35 PDK 1.0
The revision number is wrong, as a default value is printed
(tested on a mx35pdk Rev. 2.0).
Move the output in the board_late_init(), when
pmic can be accessed.
Signed-off-by: Stefano Babic <sbabic@denx.de>
enable_caches() is implemented now in cpu.c for
ARM1136.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Currently, board files are setting this field to 0x01
which the manual says is a reserved value. Change to
use the default of 0x02 - 128 cycles.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
The reset_net_chip() function has wrong timings for the reset pulse.
This appeared to work until:
0607e2b (ARMV7: OMAP: Write more than 1 byte at a time in i2c_write)
Fix the Ethernet support by introducing right timings.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Remove userbutton command and do the detection in board config file using the gpio command
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
* 'master' of git://git.denx.de/u-boot-net:
net/designware: Change timeout loop implementation
net/designware: Set ANAR to 0x1e1
net/designware: Program phy registers when auto-negotiation is ON
net/designware: Try configuring phy on each dw_eth_init
net/designware: Consecutive writes must have delay
net/designware: Phy address fix
net/designware: Fix the max frame length size
net/designware: Fix to restore hw mac address
microblaze: Wire up LL_TEMAC driver initialization
microblaze: Add faked LL_TEMAC driver configuration
microblaze: Enable several ethernet driver compilation
net: ll_temac: Add LL TEMAC driver to u-boot
Update net subsystem maintainer in doc/git-mailrc
net/eth.c: fix eth_write_hwaddr() to use dev->enetaddr as fall back
mvgbe: remove warning for unused methods
* 'master' of git://git.denx.de/u-boot-onenand:
onenand: samsung: Enable OneNAND support at Samsung's Exynos4210
onenand: Replace ONENAND_IS_MLC() with ONENAND_HAS_4KB()
onenand:samsung OneNAND chip probe functions added for GONI and Exynos4210
onenand:samsung Target dependent OneNAND chip probe function
Expand the specific configuration for the microblaze-generic
board in xparameters.h with a faked setup to enable the
LL_TEMAC driver.
Note: From now the microblaze-generic board is no longer a
valid board configuration for a real piece of hardware. Rather
than, we use the file config.mk and xparameters.h as a faked
board configuration to force the compilation of all potential
driver code for Microblaze systems.
Signed-off-by: Stephan Linz <linz@li-pro.net>
two boards were redeclaring pciauto_region_allocate() in their local
scope for no obvious reason, the function is in <pci.h> anyway,
this is probably just copying artifacts and old cruft.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
lzma: fix printf warnings
Remove CONFIG_SYS_EXTBDINFO from snapper9260.h
cmd_pxe.c: fix strict-aliasing warnings
net: smc91111: use mdelay()
doc: Fix some typos in different files
disk/part.c: Fix device enumeration through API
mkenvimage: Really set the redundant byte when applicable
mkenvimage: Don't try to detect comments in the input file
mkenvimage: Use mmap() when reading from a regular file
mkenvimage: Read/Write from/to stdin/out by default or if the filename is "-"
mkenvimage: More error handling
mkenvimage: Correct an include and add a missing one
mkenvimage: correct and clarify comments and error messages
MAKEALL: display SPL size if present
ARMV7/Vexpress: add missing get_ticks() and get_tbclk()
mkenvimage: fix usage message
cmd_fat: add FAT write command
fs/fat/fat_write.c: Fix GCC 4.6 warnings
FAT write: Fix compile errors
* 'master' of git://git.denx.de/u-boot-arm: (146 commits)
arm: Use common .lds file where possible
arm: add a common .lds link script
arm: Remove unneeded setting of LDCSRIPT
Define CPUDIR for the .lds link script
arm: Remove zipitz2 link script
Allow arch directory to contain .lds without requiring Makefile
OMAP: Remove omap1610inn-based boards
arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix build warnings
board/ti/beagle/beagle.c: Fix build warnings
sdrc.c: Fix typo in do_sdrc_init() for SPL
tegra: i2c: Add I2C driver
tegra: fdt: i2c: Add extra I2C bindings for U-Boot
tegra: i2c: Select I2C ordering for Seaboard
tegra: i2c: Enable I2C on Seaboard
tegra: i2c: Select number of controllers for Tegra2 boards
tegra: i2c: Initialise I2C on Nvidia boards
tegra: Enhance clock support to handle 16-bit clock divisors
fdt: Add function to allow aliases to refer to multiple nodes
tegra: Rename NV_PA_PMC_BASE to TEGRA2_PMC_BASE
tegra: fdt: Enable FDT support for Ventana
tegra: fdt: Enable FDT support for Seaboard
tegra: usb: Enable USB on Seaboard
tegra: usb: Add common USB defines for tegra2 boards
tegra: usb: Add USB support to nvidia boards
arm: Check for valid FDT after console is up
fdt: Avoid early panic() when there is no FDT present
tegra: usb: Add support for Tegra USB peripheral
tegra: fdt: Add function to return peripheral/clock ID
usb: Add support for txfifo threshold
tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard
tegra: usb: fdt: Add additional device tree definitions for USB ports
tegra: fdt: Add clock bindings for Tegra2 Seaboard
tegra: fdt: Add clock bindings
tegra: fdt: Add additional USB binding
fdt: Add tegra-usb bindings file from linux
fdt: Add staging area for device tree binding documentation
tegra: fdt: Add device tree file for Tegra2 Seaboard from kernel
tegra: fdt: Add Tegra2x device tree file from kernel
arm: fdt: Add skeleton device tree file from kernel
fdt: Add basic support for decoding GPIO definitions
fdt: Add functions to access phandles, arrays and bools
fdt: Tidy up a few fdtdec problems
fdt: Add tests for fdtdec
fdt: Add fdtdec_find_aliases() to deal with alias nodes
arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
net: fec_mxc: allow use with cache enabled
net: force PKTALIGN to ARCH_DMA_MINALIGN
i.MX28: Enable caches by default
i.MX28: Make use of the bounce buffer
i.MX28: Do data transfers via DMA in MMC driver
MMC: Implement generic bounce buffer
i.MX28: Add cache support to MXS NAND driver
i.MX28: Add cache support into the APBH DMA driver
ARM926EJS: Implement cache operations
board/vpac270/onenand.c: Fix build errors
nhk8815: fix build errors
atmel-boards: add missing atmel_mci.h
ARM: highbank: setup env from boot source register
ARM: highbank: change env config to use nvram
ARM: highbank: add reset support
ARM: highbank: Add boot counter support
ARM: highbank: change TEXT_BASE to 0x8000
ARM: highbank: fix us_to_tick calculation
ARM: highbank: add missing get_tbclk
ARM: highbank: fix warning for calxedaxgmac_initialize
net: calxedaxgmac: fix build due to missing __aligned definition
EXYNOS: Add structure for Exynos4 DMC
EXYNOS: SMDK5250: Support all 4 UARTs
ARM: fix s3c2410 timer code
ARM: davinci: fixes for cam_enc_4xx board
omap3_spi: receive transmit mode
calimain, enbw_cmc: Fix typo in comments
Davinci: ea20: use gpio framework to access gpios
OMAP3: mt_ventoux: sets its own mtdparts
OMAP3: mt_ventoux: updated timing for FPGA
twl4030: fix potential power supply handling issues
NAND: TI: fix warnings in omap_gpmc.c
cam_enc_4xx: Rename 'images' to 'imgs'
arm: Add Prep subcommand support to bootm
OMAP3: twister: add support to boot Linux from SPL
SPL: call cleanup_before_linux() before booting Linux
OMAP3: SPL: do not call I2C init if no I2C is set.
Add cache functions to SPL for armv7
devkit8000: Implement and activate direct OS boot
omap/spl: change output of spl_parse_image_header
omap-common/spl: Add linux boot to SPL
devkit8000/spl: init GPMC for dm9000 in SPL
omap-common: Add NAND SPL linux booting
devkit8000: add config for spl command
Add cmd_spl command
mx53ard: Initialize return code with error
mx53: Make PLL2 to be the parent of UART clock
configs: imx: Use CONFIG_SF_DEFAULT_CS
mx28evk: Provide default values for SPI bus and chip select
USB: ehci-mx6: Add proper IO accessors
mx6: Read silicon revision from register
i.MX28: Drop __naked function from spl_mem_init
mxs_spi: Return proper timeout error
i.MX28: Make the stabilization delays shorter
pmic_i2c: Return error in case of invalid pmic_i2c_tx_num
mx6: Remove duplicate definition of ANATOP_BASE_ADDR
mx6: Fix reset cause for Power On Reset case
i.MX6: mx6qsabrelite: add MACH_TYPE_MX6Q_SABRELITE
i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAG
i.MX28: Enable additional DRAM address bits
mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use for environment
mx31: add "ARM11P power gating" to get_reset_cause
mx31pdk: Fix CONFIG_SYS_MEMTEST_END
efikamx: Fix CONFIG_SYS_MEMTEST_END
mx53smd: Fix CONFIG_SYS_MEMTEST_END
mx53evk: Fix CONFIG_SYS_MEMTEST_END
mx51evk: Fix CONFIG_SYS_MEMTEST_END
i.MX6: mx6qsabrelite: add ext2 support
imximage: Remove overwriting of flash_offset
IXP: Fix GPIO_INT_ACT_LOW_SET()
IXP: Fix NAND build warning on PDNB3 and SCPU
IXP: Move PDNB3 and SCPU from Makefile to boards.cfg
IXP: Squash warnings in IXP NPE
IXP: Fix missing MACH_TYPE_{ACTUX?,PNB3,DVLHOST}
IXP: Make IXP buildable with arm-linux- toolchains
Examples: Properly append LDFLAGS to LD command
SPL: Enable YMODEM support on BeagleBone and AM335x EVM
SPL: Add YMODEM over UART load support
SPL: Add README.omap3
README: document more SPL config options
spl.c: Use __noreturn decorator
config.mk: Check for -fstack-usage support
config.mk: Make cc-option create a file under include/generated
...
The CS_AUTOBOOT configurations have been broken for a long time.
Kshitij Gupta is no longer at TI making these broken and orphaned
boards, so remove.
Signed-off-by: Tom Rini <trini@ti.com>
Fix:
beagle.c:257:13: warning: function declaration isn't a prototype
[-Wstrict-prototypes]
beagle.c:257:13: warning: function declaration isn't a prototype
[-Wstrict-prototypes]
Also make beagle_dvi_pup() checkpatch clean, fix:
ERROR: open brace '{' following function declarations go on the
next line
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
This enables I2C on all Nvidia boards including Seaboard and
Harmony.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This adds basic USB support for port 0. The other port is not supported
yet.
Tegra2 (SeaBoard) # usb start
(Re)start USB...
USB: Register 10011 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 5 USB Device(s) found
scanning bus for storage devices... 1 Storage Device(s) found
Tegra2 (SeaBoard) # ext2load usb 0:3 10000000 /boot/vmlinuz
Loading file "/boot/vmlinuz" from usb device 0:3 (ROOT-A)
2932976 bytes read
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
We set up two USB ports, one of which can be host or device.
For some reason the kernel version does enable both ports.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add the definition of the oscillator clock frequency and the 32KHz clock.
The latter is provided by a PMIC on I2C which we don't actually use at
present, but we expect this definition to be used in the kernel and want
to keep our .dts the same.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This was taken from commit b48c54e2 at:
git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Building for vpac270_ond_256 configuration fails:
arch/arm/lib/libarm.o: In function `icache_disable':
/home/ag/git/u-boot/arch/arm/lib/cache-cp15.c:156: multiple
definition of `icache_disable'
board/vpac270/libvpac270.o:/home/ag/git/u-boot/board/vpac270/onenand.c:65:
first defined here
arch/arm/lib/libarm.o: In function `dcache_disable':
/home/ag/git/u-boot/arch/arm/lib/cache-cp15.c:188: multiple
definition of `dcache_disable'
board/vpac270/libvpac270.o:/home/ag/git/u-boot/board/vpac270/onenand.c:66:
first defined here
make[1]: *** [/home/ag/git/u-boot/spl/u-boot-spl] Error 1
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
commit 72fa467988 moved atmel_mci_init() into
include/atmel_mci.h. Some AT91 boards are also using this interface and need
to include atmel_mci.h now.
This patch fixes MAKEALL complaints like this:
---8<---
Configuring for ethernut5 - Board: ethernut5, Options: AT91SAM9XE
ethernut5.c: In function 'board_mmc_init':
ethernut5.c:235:2: warning: implicit declaration of function 'atmel_mci_init' [-Wimplicit-function-declaration]
--->8---
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
CC: Reinhard Meyer <u-boot@emk-elektronik.de>
CC: egnite GmbH <info@egnite.de>
Add support to read the boot src register and set bootcmd env from the
selected bootcmdX env setting.
Based on Linkstation boot choice selection.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Implement reset for highbank platform. Reset is triggered via a wfi
instruction, so enabling armv7 for the compiler is necessary.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
This properly configures the mux to enable all UARTs.
This also fixes things so that we don't configure balls XUCTSN_1 and
XURTSN_1 as UART1 configuration (RTS/CTS), since they aren't
connected.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Chander kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
- change CONFIG_ENV_RANGE to contain 2 nand erase blocks,
one for bad block reserve.
- remove from the envvariable "img_writeramdisk" the
ubifsmount command, as it is not needed.
- erase the hole mtd partition containing u-boot
- save environment variable "dvn_app_vers" and "dvn_boot_vers"
only after installing the new image.
changes requested from Marek Vasut:
- arm, davinci: fix eldk-4.2 warnings for cam_enc_4xx board
- get rid of run_command2 usage
needed since patch:
commit 009dde1955
Author: Simon Glass <sjg@chromium.org>
Date: Tue Feb 14 19:59:20 2012 +0000
Rename run_command2() to run_command()
is now in mainline.
- add CONFIG_SPL_LIBGENERIC_SUPPORT support
- remove CONFIG_CMD_PXE support
- fix warning:
cam_enc_4xx.c: In function 'menu_handle':
cam_enc_4xx.c:609: warning: dereferencing type-punned pointer
will break strict-aliasing rules
- fix error:
arm-linux-ld: u-boot-spl: Not enough room for program headers,
try linking with -N
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Fletzer Martin <Martin.Fletzer@ait.ac.at>
Cc: Wolfgang Denk <wd@denx.de>
Drop direct access to SOC's registers and use
the function of the GPIO driver for da8xx.
[Tom: Remove gpio[68]_base as it's now unused]
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
CC: dzu@denx.de
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
To avoid a conflict with common/cmd_bootm.c's 'images' (which is
exposed as part of the Linux SPL series), rename the board-specific
'images' to 'imgs'.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <tom.rini@gmail.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Simon Schwarz <simonschwarzcor@gmail.com>
- Implements spl_start_uboot() for devkit8000
- Add configs to activate direct OS boot from SPL
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
CC: Tom Rini <tom.rini@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Wolfgang Denk <wd@denx.de>
Linux crashes if the GPMC isn't configured for the dm9000.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
CC: Tom Rini <tom.rini@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Wolfgang Denk <wd@denx.de>
The variable "rc" is the return of board_eth_init() function. Initialize
it with an error code, so that this function can return an error when
CONFIG_SMC911X is not set.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
This is needed to support Freescale-supplied userspaces.
At the moment, both the IPU and VPU libraries provided by Freescale
in the "imx-lib" package contain routines which scrape the system
revision from /proc/cpuinfo. In the VPU library, this information is
used to load the proper firmware, allowing a single binary to be used
across various i.MX processors.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
nand.c: In function ‘pdnb3_nand_read_buf’:
nand.c:107:4: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
nand.c: In function ‘pdnb3_nand_dev_ready’:
nand.c:124:18: warning: variable ‘val’ set but not used [-Wunused-but-set-variable]
Remove the 4-byte-at-time read mode altogether, the most is bogus and will
likely cause unaligned accesses.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bryan Hundven <bryanhundven@gmail.com>
Cc: Michael Schwingen <rincewind@discworld.dascon.de>
These symbols are no longer defined in Linux-ARM's mach-types files. Replace
these with CONFIG_MACH_TYPE instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bryan Hundven <bryanhundven@gmail.com>
Cc: Michael Schwingen <rincewind@discworld.dascon.de>
This prototype version SoM is unused and not available to public.
Support this only for internal debugging purposes.
Signed-off-by: Marek Vasut <marex@denx.de>
Configuring for zipitz2 board...
zipitz2.c: In function ‘board_mmc_init’:
zipitz2.c:85:2: warning: implicit declaration of function ‘pxa_mmc_register’ [-Wimplicit-function-declaration]
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
This link script seems old and incompatible with relocation and its
own sa1000 start.S file. It isn't used because the CPU's link script
was picked up in preference to this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>
commit f31a911fe (arm, post: add missing post_time_ms for arm)
enables get_ticks and get_tbclk for all arm based boards,
arm/vexpress also needs these functions to work.
Signed-off-by: Liming Wang <walimisdev@gmail.com>
Acked-by: Matt.Waddel@linaro.org
The sh7757lcr has 2GByte eMMC chip. This patch supports it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Recent bootstage commits made the code grow, which caused linker
errors. Adjust the linker script to fix that.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Common code has a mdelay() func, so use that instead of the usb-specific
wait_ms() func. This also fixes the build errors:
ohci-hcd.c: In function 'submit_common_msg':
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1519:9: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1816:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1827:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1844:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1563:11: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1583:9: sorry, unimplemented: called from here
make[1]: *** [ohci-hcd.o] Error 1
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Marek Vasut <marex@denx.de>
These calls should not be made directly any more, since bootstage
will call the show_boot_...() functions as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
This changes the number 15 as used in boot_stage_progress() to use the
new name provided for it. This is a separate patch because it touches
so many files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
A few subsystems are using the same define "NAMESIZE". This has been
working so far because they define it to the same number. However, I
want to change the size of eth_device's NAMESIZE, so rather than tweak
the define names, simply drop references to it. Almost no one does,
and the handful that do can easily be changed to a sizeof().
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds support for the esd CPCI-HD/2 board to u-boot for CPCI-CPU/750.
As the primary devices on the CPCI-HD/2 board are connected to device 1 and 3,
the device must be swapped.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
This function was defined as an extern in net/eth.c, drop that and use
standard means of calling it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
This function was defined as an extern in net/eth.c, drop that and use
standard means of calling it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Boards can select either the 'built-in' parser or the hush parser. We
should not call builtin_run_command() if we are using the hush parser.
We use run_command() instead, since it knows how to call the correct
parser.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
The current run_command() is only one of the parsing options - the other
is hush. We should not call run_command() when the hush parser is being
used. So we rename this function to better explain its purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
The reference implementation of the PCI initialization code almost
everywhere contain this fragile loop of "a few usecs", and its
use of volatile variables to delay a number of bus cycles is indeed
uncertain.
Reading the manual "Integrator/AP Users Guide", page 5-15 it is
clearly stated:
"Wait until 230ms after the end of the reset period before
accessing V360EPC internal registers. The V360EPC supports the
use of a serial configuration PROM and the software must wait for
the device to detect the absence of this PROM before accessing any
registers. The required delay is a function of the PCI Clock, but
at the lower frequency (25MHz) is 230ms".
So let's simply wait 230ms per the spec.
This solves the compilation error that looked like this:
pci.c: In function ‘pci_init_board’:
pci.c:286:18: warning: variable ‘j’ set but not used
Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fixing build regressions for the Integrator I get find that a few
boards try to work around the missing declaration of
pciauto_config_init() by declaring it in the local scope. This
does not make sense when the sibling functions are in <pci.h>
so move the function to the header, ridding the build error
in the Integrator and getting rid of the local declarations
here and there.
Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fix build error for ethernut5 board due to prototype change
for function board_mmc_getcd().
ethernut5.c:238: error: conflicting types for 'board_mmc_getcd'
u-boot/include/mmc.h:318: note: previous declaration of 'board_mmc_getcd'
was here
make[2]: *** [ethernut5.o] Error 1
Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com>
Cc: Tim Schendekehl <tim.schendekehl@egnite.de>
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: egnite GmbH <info@egnite.de>
The video setup for the Epson display is provided. Addtionally
some extra info is displayed next to the Linux logo.
Make get_cpu_rev() publicly available (added to sys_proto.h).
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Define CONFIG_PHY_MICREL, and
minimize the tx clock delay.
There is an issue with 1000 baseTx mode on early revs
of the SabreLite boards. The center tap pin 9 of the mag RJ45
USB combo was connected to the 3.3 filtered supply. Letting
this pin float solved the problem. Symptoms of the problem
were packets with many extra zeroes tacked on the end, and random
bit flips causing a high rate of CRC errors. 10/100 baseTx worked
fine on all revs. To disable 1000 baseTx for these boards, simply
define the environment variable disable_giga. ie.
setenv disable_giga 1
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Boards may have things they want done before or after normal phy config.
Letting the boards call drv->config allows them more flexibilty.
Boards affected by this change are corenet_ds and mpc8544ds.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
The PCI support for the Integrator AP has apparently never
been finished and I strongly suspect that it has never worked,
so let's fix it. This is a list of the more or less
un-splittable changes done in this driver rewrite:
- Replace the register definitions stashed into the config
file (!) with a copy if the register file from the Linux
kernels arch/arm/include/asm/hardware/pci_v3.h
- Delete the unreadable gigantic macros that perform the
config accesses and replace them with copyedited code from
Linux arch/arm/mach-integrator/pci_v3.c
- Rewrite the rest of the setup code to use the
v3_[read|write][lwb]() accessors.
- Enable PCI by default in the AP board configuration.
- Fix checkpatch warnings and make code more conformant.
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The U-Boot startup infrastructure already makes sure pci_init() is
called at a proper time, calling it again from within the board
setup code will not make things better.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In commit 2d575e4685 a separate header
file was introduced for the DM6467T EVM, include/configs/davinci_dm6467Tevm.h.
The substantial difference between the davinci_dm6467evm and the
davinci_dm6467Tevm configuration is a single bit in the hardware revision
that is passed to the Linux kernel and davinci_dm6467evm has
REFCLK_FREQ = 27000000 where as davinci_dm6467Tevm.h has a
REFCLK_FREQ = 33000000.
This patch removes include/configs/davinci_dm6467Tevm.h. Instead the
include/configs/davinci_dm6467evm.h configuration is used for DM6467T EVMs and
renamed CFG_REFCLK_FREQ to CONFIG_REFCLK_FREQ and CONFIG_REFCLK_FREQ is defined
in boards.cfg.
Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com>
Cc: Tom Rini <trini@ti.com>
add support to read mac address for AM18x EVM manufactured from
Spectrum digital which have mac address stored in I2C EEPROM manufactured
by WINBOND. This patch reads mac address from I2C EEPROM and sets the
environment variable if not set, If mac address is already present in
environment compare it with the mac address in EEPROM and warn on
mismatch.Introduced a config option CONFIG_MAC_ADDR_IN_EEPROM to where
to look for the mac address.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Wolfgang Denk <wd@denx.de>
add support to read mac address for da850/L138 evm manufactured by
Logic PD which store mac address in SPI flash manufactured by ST
Microelectronics. This patch adds support to read mac address from
SPI flash and set the mac address if it hasn't been set in environment,
If it has been set in the environment it compares the value one with
SPI flash and warns on mismatch. Introduced a config option
CONFIG_MAC_ADDR_IN_SPIFLASH indicating where to look mac address for.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Wolfgang Denk <wd@denx.de>
this patch addresses the issue that there is no DVI output on beagleboard-xm in
u-boot; the TFP410 is not powered on, DVI_PUP needs to be set high
this is done differently on beagleboard-xm rev. B/C versus earlier boards:
beagleboard-xm B/C need to set GPIO2 of the TWL4030
earlier boards need to set GPIO170
note that the change occured somewhere inbetween beagleboard-xm rev. A2 and A3
note that beagleboard-xm rev. A and rev. B cannot be distinguished using
get_board_revision(), REVISION_XM_A/REVISION_XM_B is bogus
due to this glitch, the patch cannot work correctly on some beagleboard-xm
rev A/B boards
tested on beagleboard-xm rev. C (you should see orange color on a monitor)
note that the framebuffer is NOT yet set up, this could be done along the
lines below (for 800x480 resolution and RGB24) before calling omap3_dss_enable()
static void configure_frame_buffer() {
writel(0x80500000, (uint *) 0x48050480); // address
writel(0x80500000, (uint *) 0x48050484);
writel(0x01df031f, (uint *) 0x4805048c); // size
writel(0x00000091, (uint *) 0x480504a0); // RGB24
}
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
MX35PDK board does not need to print CPU revision and reset cause in board file
because this is printed by common code when CONFIG_DISPLAY_CPUINFO is selected
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Use gpio_direction_input prior to gpio_get_value.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Use gpio_direction_input prior to gpio_get_value.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
This patch adds SPI support for the MX28EVK. Support for
an optionally installed SPI flash is also added. An example
configuration for redundant envrionment from SPI flash is also
added but disabled by default.
This patch has been tested on a MX28EVK Rev. D with an installed
SST25VF032B 32Mbit SPI flash.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
This patch enables USB host support on the MX28EVK board.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* 'master' of git://git.denx.de/u-boot-blackfin:
Blackfin: pata_bfin: fix printf warning
Blackfin: bfin_nand: mark local func static
linkage.h: move from blackfin to common includes
Blackfin: br4: new board port
Blackfin: add in/out le32 variants
post: add blackfin to the post_time_ms list
Blackfin: bf537-stamp: drop board reset workaround
Blackfin: pr1: new board port
This adds support for the BR4 Appliance. It is a quad channel ISDN BRI
board based on Blackfin BF537 CPU.
Signed-off-by: Dimitar Penev <dpn@switchfin.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The bf537-stamp shouldn't need this SPI flash workaround. It was added
by accident a long time ago through a convoluted series of steps which
originated from a customer board (not the bf537-stamp). So drop it to
keep people from incorrectly adding it to their own boards.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This add support for the PR1 Appliance - Asterisk based ISDN PRI PBX.
This board is Blackfin BF537 based. The schematics are not fully opened.
Signed-off-by: Dimitar Penev <dpn@switchfin.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds support for the Calimain board from
OMICRON electronics GmbH. The board features a Texas Instruments AM1808
SoC, 128 MB DDR2 memory, and 64 MB NOR flash memory connected to CS2 and
CS3.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
This patch moves hawkboard to the new spl infrastructure from the
older nand_spl one.
Removed the hawkboard_nand_config build option -- The spl code now
gets compiled with hawkboard_config, after building the main u-boot
image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard
to reflect the same.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
The initial checkin dropped pinmux setup for GPMC pins A6-A10, D0-D7 and
NCS1/2 necessary to access LAN92xx on Logic OMAP35x/DM37x modules.
Signed-off-by: Peter Barada <peter.barada@logicpd.com>
This patch adds support for the HTKW mcx AM3517-based board.
Serial, Ethernet, NAND, MMC, RTC, EHCI USB host and both
NAND and MMC SPLs are supported.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <tom.rini@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
The mt_ventoux board is a custom board using
the Technexion TAM3517 module.
The patch fixes also the mtdparts variable in the
TAM3517 common configuration file.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Ilya Yanok <yanok@emcraft.com>
CC: Igor Grinberg <grinberg@compulab.co.il>
CC: Tom Rini <tom.rini@gmail.com>
Cc: Detlev Zundel <dzu@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Changed the EHCI interface using the ulpi framework.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <tom.rini@gmail.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
For panda initialise the mux pins for ehci usage and
enable ehci in omap4_panda config file.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Clean up added ehci-omap.c and make it generic for re-use across
omap-soc having same ehci ip block. Also pass the modes to be configured
from board file and configure the ports accordingly. All usb layers
are not cache aligned, till then keep cache off for usb ops as ehci will use
internally dma for all usb ops.
* Add a generic common header ehci-omap.h having common ip block
data and reg shifts.
* Rename and modify ehci-omap3 to ehci.h retain only conflicting
sysc reg shifts remove others and move to common header file.
* pass the board data for beagle/panda accordinly to use
ehci ports.
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Extend the existing ulpi viewport framework
to pass the port number information for any ulpi
ops. Fix the usage of ulpi api's accordingly.
Tested-by: Stefano Babic <sbabic@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
This patch enable support for SMC911X based ethernet device.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds support for MMC SPL booting.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
SMDK5250 board is based on Samsungs EXYNOS5250 SoC.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: HeungJun, Kim <riverful.kim@samsung.com>
This patch adds support for Samsung TRATS board
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds support for D-Link DNS-325 ShareCenter NAS.
Signed-off-by: Stefan Herbrechtsmeier <stefan@code.herbrechtsmeier.net>
Cc: prafulla@marvell.com
Cc: albert.u.boot@aribaud.net
board_mmc_init() initializes the pins of SDHC1 and
turns on V_MMC1 of the PMIC. Config adds support for EXT2
and FAT.
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Commit 314284b156 has
changed board_mmc_getcd() function prototype, while
mx6qarm2 has still the old one.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
This allows the Linux kernel to use UART1 before pinmux
support is added for UART1
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Since commit 97039ab98 (env_mmc: Allow board code to override the environment address)
mmc_get_env_addr is a weak-aliased function in common/env_mmc.c
The mmc_get_env_addr implementation that exists at
board/freescale/common/sdhc_boot.c is meant to be used only for PowerPC boards,
but currently it is being used for all platforms that have CONFIG_ENV_IS_IN_MMC defined.
Introduce CONFIG_FSL_FIXED_MMC_LOCATION so that the boards that need to use
the mmc_get_env_addr version from board/freescale/common/sdhc_boot.c could activate
this config option on their board file.
This fixes the retrieval of CONFIG_ENV_OFFSET on non-PowerPC boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefano Babic <sbabic@denx.de>
- CONFIG_SYS_MMC_ENV_DEV, needed if environment on mmc
- wait for 1 second timer in board_late_init() only, if
timer is running.
- add UBI/UBIFS support
- add FIT images support
- menu support
- U-Boot max size now 0xa0000
- SPL now Block 0 page 0
- new MTD partitioning
0x00000000 SPL
0x00020000 UBL-Header
0x00040000 UBL-Header
0x00060000 UBL-Header
0x00080000 UBoot (0xa0000(U-Boot length) + 0x60000(3 spare blocks))
0x00180000 ENV- Variablen (1)
0x001a0000 ENV- Variablen (2)
0x001c0000 ENV- Variablen (reserved for Bad Block)
0x001e0000 ENV- Variablen (reserved for Bad Block)
0x00200000 UBI-Device
UBI Volumes:
„default“: contain environment-default values
„rootfs1“: UBIFS root-fs (1); contain linux kernel image
„rootfs2“: UBIFS root-fs (2); contain linux kernel image
„data-ro“: UBIFS data (read only)
„data-rw“: UBIFS data (read/write)
- new environment variables:
- app_reset
(this is only passed per cmdline to linux)
- dvn_app_vers
string from ramdisk description contained in the
FIT image
- dvn_boot_vers
string from ubootimage description contained in the
FIT image
- saveparms, restoreparms, restoretmpparms, savetmpparms
helper for saving network parameter.
- ubiargs
set ubi kernel cmdlinargs for booting with a ubifs rootfs
- ubi_ubi boot with reading kernel image from ubifs, and
use a ubifs as rootfs
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Wolfgang Denk <wd@denx.de>
Tricorder is a board which is very similar to the Devkit8000. It
is designed as a base platform for further medical devices.
www.corscience.de/en/medical-engineering/products/multiparameter/mp10-board.html
Signed-off-by: Thomas Weber <weber@corscience.de>
The logic for the rev C4 boards was missing one of the cases
(variant with Micron NAND and 2x128MB).
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Use the new funcmux_select() feature to set up the MMC pin mux.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Use the new funcmux_select() feature to set up the MMC pin mux.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Use the new funcmux_select() feature to set up the MMC pin mux.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook
derived from the NVIDIA Tegra Harmony reference board. It ships with
Android, but is often repurposed to run Linux. This patch adds just enough
support to get a U-Boot serial console, and the ability access built-in
eMMC and the external SD slot.
v2:
* Rebased on latest HEAD, incorporated changes made to other board files.
* Moved board files from board/nvidia to board/compal.
* Switched to correct odmdata value. This required add the previous patch
to fix U-Boot's interpretation of the odmdata RAM size field.
* Removed nvmem= from default Linux kernel command-line; no drivers use the
reserved memory yet, so there's no point reserving it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The bf527-ezkit boards are getting too big to fit into their reserved
flash space, so we need to use a lzma compressed logo.
Since the video driver code is very similar, add lzma compressed support
to all of the Blackfin video drivers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* implementation based on ti beagleboard/omap3evm
* timing data and i2c workaround for revision 0 boards taken from x-loader
* run-tested with overo revision 0 and 1 / boot from NAND and SDcard
* run-tested with x-loader
Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Signed-off-by: Tom Rini <trini@ti.com>
This patch is added to support SPL feature on AM335X
platform. In this patch, MMC1 is configured as boot
device for SPL and support for other devices will be
added in the next patch series.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
This patch add supports for mmc/sd driver on AM335X platform.
PLL and pinmux configurations for mmc/sd are configured in this
patch.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Switch to the new EEPROM module and fix the problem of MAC address
being read from the wrong offset due to lack of distinction between
EEPROM layouts.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Read revision from EEPROM and pass it to Linux.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Add board specific EEPROM handling module,
read the serial number from the EEPROM and pass it to Linux.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Move #ifdef CONFIG_SMC911X out of board_eth_init() function,
simplify the board_mmc_init() function, and enclose handle_mac_address()
in the CONFIG_SMC911X.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
This patch adds basic support for OMAP35x/DM37x SOM LV/Torpedo
reference boards. It assumes U-boot is loaded to SDRAM with the
help of another small bootloader (x-load) running from SRAM.
Signed-off-by: Peter Barada <peter.barada@logicpd.com>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Now the values in the defines agree with those in the manuals.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Add the initial support for Freescale i.MX6Q Sabre Lite board
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Eric Nelson <eric.nelson@boundarydevices.com>
Remove 'all' target from Makefile, as this is unused code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Remove 'all' target from Makefile, as this is unused code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Add initial support for Freescale MX28EVK board.
Tested boot via SD card and by loading a kernel via TFTP through
the FEC interface.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Let dram_init function be a common function, so that other mx28 boards
can reuse it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Let imx_get_mac_from_fuse function be a common function, so that other
mx28 boards can reuse it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Add multi-FEC support for imx_get_mac_from_fuse by passing dev_id as a parameter.
This feature is important on mx28 SoC for example that has two FEC ports.
Cc: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Bits 0 and 1 of CCM_CCGR7 are the usboh3 clock enable bits. Enabling this
clock is necessary for the USB download.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
CC: Jason Hui <jason.hui@linaro.org>
Acked-by: Jason Hui <jason.hui@linaro.org>
This enable the network function on the i.mx6q armadillo2
board(arm2), thus we can use tftp to load image from network.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
* 'master' of git://git.denx.de/u-boot-mpc85xx:
fsl_lbc: add printout of LCRR and LBCR to local bus regs
sbc8548: Fix up local bus init to be frequency aware
sbc8548: enable support for hardware SPD errata workaround
sbc8548: relocate fixed ddr init code to ddr.c file
sbc8548: Make enabling SPD RAM configuration work
sbc8548: Fix LBC SDRAM initialization settings
sbc8548: enable ability to boot from alternate flash
sbc8548: relocate 64MB user flash to sane boundary
Revert "SBC8548: fix address mask to allow 64M flash"
MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC
eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM
eXMeritus HWW-1U-1A: Minor environment variable tweaks
* 'master' of git://git.denx.de/u-boot-ppc4xx:
board/mpl/pati: use the CFI driver for the PATI board
board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board
board/mpl/pip405: use the CFI driver for the PIP405 board
board/mpl/common: remove the old legacy flash
ppc4xx: Setup HICB on Io64
* 'master' of git://git.denx.de/u-boot-mpc83xx:
mpc8313erdb: fix mtdparts address
powerpc/83xx/km: add support for 8321 based tuge1 board
powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1
powerpc/83xx/km: remove obsolete defines for tuda1
powerpc/83xx/km: update SDRAM parameters for km8321 boards
mpc8313erdb: Enable GPIO support on the MPC8313E RDB
mpc83xx: Add a GPIO driver for the MPC83XX family
gpio: Replace ARM gpio.h with the common API in include/asm-generic
gpio: Modify common gpio.h to more closely match Linux
The code here was copied from the mpc8548cds support, and it
wasn't using the CONFIG_SYS_LBC_LCRR define, and was just
unconditionally setting the LCRR_EADC bit. Snooping with a
hardware debugger also showed we had LCRR_DBYP set, since we were
setting it based on a read of an uninitialized lcrr read via
clkdiv. Borrow from the code in the tqm85xx.c support to add
LBC frequency aware masking of these bits.
This change will correct reliability issues associated with trying
to use the 128MB of LBC 100MHz SDRAM on this board. Thanks to
Keith Savage for assistance in diagnosing the root cause of this.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Existing boards by default have an issue where the LBC SDRAM
SPD EEPROM and the DDR2 SDRAM SPD EEPROM both land at 0x51.
After the hardware modification listed in the README is made,
then the DDR2 SPD EEPROM appears at 0x53. So this implements
a board specific get_spd() by taking advantage of the existing
weak linkage, that 1st tries reading at 0x53 and then if that
fails, it falls back to the old 0x51.
Since the old dependency issue of "SPD implies no LBC SDRAM"
gets removed with the hardware errata fix, remove that restriction
in the code, so both LBC SDRAM and SPD can be selected.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Nothing to see here, just a relocation of the fixed ddr init
sequence to live in the actual ddr.c file itself.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Valentin Longchamp
Wolfgang Denk
Wu, Josh
Andreas Bießmann
Bo Shen
Lukasz Majewski
Benoît Thébaudeau
Stefano Babic
Ashok Kumar Reddy
Matt Sealey
Marek Vasut
trem
Otavio Salvador
Fabio Estevam
Troy Kisky
Vikram Narayanan
Rajeshwari Shinde
Allen Martin
Stephen Warren
John Rigby
Mathieu J. Poirier
Heiko Schocher
Sughosh Ganu
Tom Rini
Veli-Pekka Peltola
Markus Hubig
Enric Balletbò i Serra
Javier Martinez Canillas
Chandan Nath
Ilya Yanok
Peter Meerwald
Steve Sakoman
Lad, Prabhakar
Rajashekhara, Sudhakar
Igor Grinberg
Stefan Roese
Anatolij Gustschin
Scott Wood
Timur Tabi
Paul Gortmaker
Matthew McClintock
Shaohui Xie
Liu Gang
Jens Scharsig
Hongtao Jia
Gerlando Falauto
Holger Brunck
SRICHARAN R
Stephan Linz
Stephen Warren
Tom Warren
Thierry Reding
Peter Meerwald
Michal Simek
esw@bus-elektronik.de
Shiraz Hashim
Amit Virdi
Vipin KUMAR
Thomas Herzmann
Simon Guinot
Michael Walle
Alexandre Belloni
Donghwa Lee
Nikita Kiryanov
Lucas Stach
Tom Warren
York Sun
Shengzhou Liu
Prabhakar Kushwaha
ramneek mehresh
Nobuhiro Iwamatsu
Stefan Bigler
Christian Herzig
Nobuhiro Iwamatsu
Phil Edworthy
Joe Hershberger
Mike Frysinger
Tero Kristo
Anton Staff
Simon Glass
Jimmy Zhang
Wei Ni
Eric Nelson
Lauri Hintsala
Fabio Estevam
Minkyu Kang
Chander Kashyap
Grazvydas Ignotas
Nishanth Menon
Jonathan Solnit
David Purdy
Luka Perkov
Vladimir Zapolskiy
Dirk Eibach
Chunhe Lan
Macpaul Lin
Dirk Behme
Joel Fernandes
Linus Walleij
Andreas Bießmann
Rob Herring
Doug Anderson
Christian Riesch
Simon Schwarz
Wolfgang Grandegger
Marek Vasut
Vasily Khoruzhick
Liming Wang
Yoshihiro Shimoda
Reinhard Arlt
prabhakar.csengg@gmail.com
Daniel Gorsulowski
Helmut Raiger
Hadli, Manjunath
Matthias Fuchs
Dimitar Penev
Peter Barada
Ilya Yanok
Govindraj.R
HeungJun, Kim
Stefan
Jason Liu
Thomas Weber
robertcnelson@gmail.com
Patil, Rachna
Andreas Müller
Stefan Kristiansson