Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the required brackets, so that we don't write unused registers
with potentially bogus values.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds a framework to describe, access, store and restore a set of
variables. A state variable set can be fully described in a devicetree node.
This node could be part of the regular devicetree blob or it could be an extra
devicetree solely for the state. The state variable set contains variables of
different types and a place to store the variable set.
For more information see:
Documentation/devicetree/bindings/barebox/barebox,state.rst
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Simplify PIO mode routines.
Fix a bug when IO is possibly performed twice because of using old
interrupt status.
Support for slow-speed card writes.
Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When a PWM does not have an of alias generate a name from the
base address so that we can register it successfully.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This better separates the DMA from the MMU functionality.
Also move all drivers that only depends on asm/mmu.h for the alloc
functions over to the common header.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As a lot drivers currently rely on the 1:1 virt->phys mapping on ARM
we define DMA_ADDRESS_BROKEN to mark them. In order to use them on
other architectures with a different mapping they need proper fixing.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows to consolidate the prototype of this function across
architectures. Also guard against calles that pass in NULL as the
dma handle pointer.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
NULL pointers should be treated as dummy clocks as done in the kernel.
Using a not fully filled in clk * array for of_clk_add_provider may result
in NULL clks. When these are passed into the clk framework we should not
crash.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It is required for Rockchip SoCs where clock settings registers have
write-enable mask in high word.
Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It is required for Rockchip SoCs where clock settings registers have
write-enable mask in high word.
Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support for the default-state device tree property.
Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows to have fixed device names for the SDMMC
controllers.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
of_alias_get assumed that a DT path is always the full node path,
whic is not necessarily the case, as there are other valid path
descriptions. All of them are handled by of_find_node_by_path.
As there is already a preparsed list with all DT aliases that handles
this case properly we can simply reuse that one.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The cache should be invalidated when transfering ownership of a buffer
to the device. Otherwise the writeback of dirty cache lines can
corrupt the hardware written data.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver is written in a way that is should also work without
DT, but it had a compile time dependency on CONFIG_OFTREE.
Fixes:
drivers/built-in.o: In function `dwc_probe_dt':
drivers/net/designware.c:413: undefined reference to `of_get_phy_mode'
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Silence warning about cast from volatile to normal pointer,
as this is the intended bhavior here.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
By taking parts of the programming handshaking protocol on faith it is
possible to make due with only two GPIO for programming Altera
FPGAs. This is not a very advisable practice, but sometime unavoidable
in GPIO constrained designs.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The partitions parameter allows to partition a mtd device
using a standard cmdline partition description string. This
way the partitions of a mtd device can be changed at once.
The output of the string can be used to be passed to the kernel
as cmdline partition string. The partitions can also still be
changed with addpart/delpart, the partitions parameter will
be updated accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mtd_add_partition is passed a flag parameter. This has been unused
so the DEVFS_PARTITION_FIXED and DEVFS_PARTITION_READONLY were ignored.
Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
mtd partitions should not conflict with each other, so forbid this.
Also add the partitions to the partitions list sorted, so that they
can be easier translated into a cmdline partition string.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
the bb devices which are created in add_mtd_device() must be removed
in del_mtd_device(). Also remove deletion of the bb devices in the
mtdparts-add environment file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The NFC command used for reading the result of a READID command to the NAND chip
reads 6 bytes (in x8 mode) or 6 words (in x16 mode with the upper bytes all
being 0). So there is no need to safe 16 bytes for later consumption.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This corresponds to commit c7f23a70635895b5125aeb5593aaf8cb44d3a088 in
the Linux kernel.
One notable difference is however that ONFI detection is allowed here
even in 16-bit mode. This is proved to work fine on an i.MX25 based
machine with a x16 NAND.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are a few NAND commands that make the chip only respond on I/O
lines 0 to 7 even for x16 devices. READID (90h) is one such command
which was already handled fine in the driver (at least for NFC v1 and
v2). Other commands (like PARAM (ECh) to read out ONFI parameters)
however were not handled properly. Instead of adding another callback
make the read_byte callback handle the holes added by the NFC and depend
on the nand-base support to call read_byte when necessary instead of
read_buf.
This fixes reading the ONFI parameter page on an i.MX25 with an x16 NAND
and probably[1] also the result of READID on i.MX51/i.MX53 with x16
NAND.
[1] untested because no matching machine available
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
in nand_bb_read() 'offset' contains the virtual position on the device,
but we have to test for a bad block on the raw physical position, so
use bb->offset instead of offset
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When a block is marked bad after the bb device has been created
the real size of the bb device is smaller than the calculated size
on creation. In this case we can't rely on the upper layers anymore
that they won't pass read/write sizes in that fit into the device.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Partitions are mtd devices themselves, but the 'erasebad'
parameter is only set to the master mtd device. To allow to
erase bad blocks on partitions test the master device instead
of the partition devices.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is broken since:
| commit 00f119a293
| Author: Sascha Hauer <s.hauer@pengutronix.de>
| Date: Fri Aug 1 14:09:48 2014 +0200
|
| mtd: omap gpmc: fix ecc bytes/size
|
| The ecc bytes / size are per subpage, not per page.
|
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The ecc code in omap_correct_data() expects to correct a whole page
at once, so we must tell the nand layer that we have 4 * 13 bytes of
ecc bytes and 4 * 512 bytes of ecc size. Otherwise the NAND layer will
iterate over 512 byte steps over a page and call the .correct callback
each time.
This only works for 2k pagesize and needs revisit once other page sizes
shall be supported. It would be better to tell the nand layer the real
ecc bytes (13) and ecc size (512) instead and drop the iteration in
omap_correct_bch(). However, this needs better testing so it isn't done
here now.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will allow to handle IP power automatically and not at board level
Mainline kernel need this as they do not have the regulator driver support
as some IP such as USB are not power on at boot
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will use the device name as regulator name
with the same Algo as clkdev for lookup
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If without pass the vbus initial value, the vbus status alway
present as 0 even if the vbus is connected to 5v.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Improve smc1111 driver debug messages by printing the register accessed,
the current bank, and the values.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All the smcs family chips 91c94, 91c96, 91c100, 91c111 share almost the
same behavior and register sets. The noticeable exceptions are coped
with in this patch, ie :
- 91c94 and 91c96 only have an internal 10 Mbps phy
The registers used for phy discovery on later chips will corrupt the
91c96 state.
- 91c94 and 91c96 have a control and config register quite different
from their 91c1xx conterparts
A platform data user defined couple of registers is introduced. If
these values are 0, 91c1xx legacy behavior is assumed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Smc network IPs can be wired up in different funny ways. For example the
lubbock pxa25x development platform wires all address lines shifted by
2, ie. bus A2 is smc91c96 A0, bus A3 is smc91c96 A1 etc ...
In order to cope with the different possible combination, add a shift
parameter for addresses.
By default, the old behaviour using the 32 bit accesses is kept.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The file drivers/pinctrl/pinctrl.c is compiled only when
CONFIG_PINCTRL is defined. "IS_ENABLED(CONFIG_PINCTRL)" is
always evaluated as 1 in this function.
(Although the compiler would optimize it, the source file does
not look nice.)
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This function is only used in drivers/usb/*.
It is equivalent to mdelay().
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The parameters ECC Strength, BadBlockMarkerByte and BadBlockMarkerStartBit in
the FCB structure depends on the nand chip's pagesize and oobsize. Instead of
hardcoding these values into the imx6 bbu handler calculate these values on the
fly. Therefore we export the necessary functions from the nand_mxs driver to
use them in the bbu handler.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If creating an AMBA device failed, maybe because AMBA support is
not compiled in, register the device as regular platform device.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds device tree support for the stm serial driver. This
driver really is a AMBA primecell, so the amba-pl011 could be
used. However, the current code tries to get the apb_pclk before
the clocks are registered, so this does not work. Use the stm
driver instead until a solution is found.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add device tree compatibles and allow retrieving data from device tree
instead of platform_data only.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The driver is taken from the Linux kernel, with the following changes :
- all DMA removed
- all asynchronous handling removed, including the interrupt handler,
and the asynchronous state handling
- pxa armada support removed
Most the kernel structure was kept, to ease up future fixes integration
from the kernel driver.
The driver is tested on a pxa3xx system development
board (aka. zylonite), and reading, writing, erasing, and bad block
management were tested.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
In function `dsps_probe': undefined reference to `of_usb_get_dr_mode'
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This helps with EMMC detection when booting from EMMC directly.
Taken from u-boot.
Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add code to support SPI transfers that have data shifted out least
significant bit first. This is useful in many cases, but specifically
it is needed for drivers/firmware/altera_serial.c to work on i.MX
platform.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can use dynamic number id with specific devname
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The commit
commit 0d7a213345
Author: Antony Pavlov <antonynpavlov at gmail.com>
Date: Wed Sep 10 11:42:19 2014 +0400
MIPS: dts: use physical addresses (as Linux does)
With IOMEM() adapted for MIPS we can use physical addresses
in device tree reg property.
has switched MIPS dts files to physical addresses usage.
The patch was tested on qemu, but qemu malta board is tolerant
of using physical addresses for accesing to device
(Ingenic JZ4755 and JZ4780 processors are tolerant too!).
But other CPUs (e.g. Loongson LS1B) can throw an exception
in this situation.
Additional physical address to virtual address translation
on MIPS is needed.
We already have this in include/common.h
#if defined(CONFIG_MIPS)
#include <asm/addrspace.h>
#define IOMEM(addr) ((void __force __iomem *)CKSEG1ADDR(addr))
#else
#define IOMEM(addr) ((void __force __iomem *)(addr))
#endif
So use IOMEM() to fix dev_request_mem_region() return value.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This file originates in Linux. Linux has it under include/linux/
directory since commit dccd2304cc90.
Let's move it to the same place as well in barebox.
This commit was generated by the following commands:
find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:'
git mv include/sizes.h include/linux/
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
broken since
commit ed6e965824
Author: Sascha Hauer <s.hauer@pengutronix.de>
resource: Let dev_request_mem_region return an error pointer
Introduce dev_request_mem_region_err_null
only used on platform like at91 where the resource address conflicts
with errno PTR.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The CPSW has two slaves. When one of them fails to setup continue
anyway with the other one. This fixes a crash in the beaglebone black
which only has one slave connected. The code doesn't find a phy on
the second slave and bails out, but the error path is broken: It frees
the private data structures which contains used resources.
Reported-by: Philippe Leduc <ledphilippe@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the SMC1111 has a shared pool of 2k memory buckets for both
transmission and reception, and as there are variants which have as few
as 4 buckets in total, the memory pool can be hogged by unclaimed
receptions, and impeed any further transmission.
This happens on the zylonite pxa board, where 4 packets, most probably
icmp and arp, fill the 4 buckets, preventing any further ethernet
transmission, and stalling the driver.
The fix is rather rough : whenever all the buckets are filled by
reception packets, and if a transmission is required, the transmission
code path will empty up all received packets.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The compatible "ti,omap4-i2c" don't help to get fclk_rate. So set it acording to
cpu compatible: "ti,am33xx" and "ti,omap4"
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix for a compiler complaint, because print_packet is needed by a
function before it is declared.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The buffer descriptors are allocated from coherent memory, so there
is no cache maintenance needed. Only tell the compiler that the descriptors
can be modified by the hardware.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This uses i2c functions that may not be available in every configuration
and is only needed if EDID support is enabled, which in turn already
selects I2C.
Fixes:
drivers/video/imx-ipu-v3/imx-hdmi.c:
undefined reference to `of_find_i2c_adapter_by_node'
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This will disable the capability to boot an uploaded image directly,
but keeps other fastboot functionality. This seems like a valid config.
Fixes:
In function `do_bootm_on_complete': undefined reference to `bootm_boot'
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Parts of the driver need these regardless of whether CONFIG_MCI_INFO
is set, so add these fields unconditionally.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The poller has been merged to the gadget core, so
now the core needs poller support, not the individual drivers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
musb_barebox.c contains code that is only ever used if CONFIG_MUSB_HOST
is set. Building it uncoditionally breaks the build depending on the link
order.
Fixes:
drivers/usb/musb/musb_barebox.c:64: undefined reference to `musb_urb_enqueue'
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The reset default of this register has changed on i.MX6sx. Explicitly
write the value we want to have to make it work on i.MX6sx.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver currently only works on OpenRISC, as it uses
the cache flush/invalidate functions of this arch.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This fixes NAND initialization issue which appears occasionally on
some i.MX6 SoCs (particulary was observed on phyCARD-i.MX6 with
i.MX6Solo).
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fastboot gadget needs the 'release_string' which is available only
if CONFIG_BANNER is set.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This got lost during bd1bf53b34
(mci: imx-esdhc: factor out common sdhci registers). Seems the PIO
option isn't too heavily used.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Both components need the OF display timings helpers.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
.../altera_serial.c:118:2: warning: too many arguments for format
Also sz is of type size_t, so use proper format specifier.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fixes:
.../altera_serial.c:84:6: error: void value not ignored as it ought to be
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver uses a lot of arch specific functionality and
fails to build on anything but SOCFPGA.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Like mentioned in the coment we need the size of the entire flash chip.
Check if a master exists and take his size.
Otherwise the limit will be too small and kernel prints:
UBI warning: print_rsvd_warning: cannot reserve enough PEBs for \
bad PEB handling, reserved 19, need 20
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Lucas Stach
Lucas Stach
Sascha Hauer
Andrey Panov
Hubert Feurstein
Marc Kleine-Budde
Andrey Smirnov
Uwe Kleine-König
Brian Norris
Jean-Christophe PLAGNIOL-VILLARD
Bo Shen
Robert Jarzmik
Masahiro Yamada
Stefan Christ
Wadim Egorov
Antony Pavlov
Jan Weitzel
Jan Luebbe
Dmitry Lavnikevich